eicechain.h

ARM核的边界扫描(JTAG)的实现,此代码在s3c2400上测试通过

//////////////////////////////////////////////////////////////////////////////
// EmbeddedICE Macrocell                                                    //
//////////////////////////////////////////////////////////////////////////////
// registers
#define EICE_DEBUG_CONTROL					0x00	// 4
#define EICE_DEBUG_STATUS					0x01	// 5
#define EICE_VECTOR_CATCH_CONTROL			0x02	// 8
#define EICE_DEBUG_COMMS_CONTROL			0x04	// 6	bits: 0=debugger->processor, 1=processor->debugger, 28..31=2 (version)
#define EICE_DEBUG_COMMS_DATA				0x05	// 32
#define EICE_WATCHPOINT0_ADDRESS_VALUE		0x08	// 32
#define EICE_WATCHPOINT0_ADDRESS_MASK		0x09	// 32
#define EICE_WATCHPOINT0_DATA_VALUE			0x0A	// 32
#define EICE_WATCHPOINT0_DATA_MASK			0x0B	// 32
#define EICE_WATCHPOINT0_CONTROL_VALUE		0x0C	// 9
#define EICE_WATCHPOINT0_CONTROL_MASK		0x0D	// 8
#define EICE_WATCHPOINT1_ADDRESS_VALUE		0x10	// 32
#define EICE_WATCHPOINT1_ADDRESS_MASK		0x11	// 32
#define EICE_WATCHPOINT1_DATA_VALUE			0x12	// 32
#define EICE_WATCHPOINT1_DATA_MASK			0x13	// 32
#define EICE_WATCHPOINT1_CONTROL_VALUE		0x14	// 9
#define EICE_WATCHPOINT1_CONTROL_MASK		0x15	// 8

// debug control
#define EICE_DEBUG_CONTROL_DBGACK			0x01
#define EICE_DEBUG_CONTROL_DBGRQ			0x02
#define EICE_DEBUG_CONTROL_INTDIS			0x04
#define EICE_DEBUG_CONTROL_SINGLE_STEP		0x08	// only alter bit if in debug state

// debug status. ???? 0=not allowed to read, 1=allowed to read ???
#define EICE_DEBUG_STATUS_DBGACK			0x01
#define EICE_DEBUG_STATUS_DBGRQ				0x02
#define EICE_DEBUG_STATUS_IFEN				0x04
#define EICE_DEBUG_STATUS_SYSCOMP			0x08
#define EICE_DEBUG_STATUS_ITBIT				0x10

// vector catch. 0=ignore, 1=catch
#define EICE_VECTOR_CATCH_RESET				0x01
#define EICE_VECTOR_CATCH_UNDEFINED_INSTR	0x02
#define EICE_VECTOR_CATCH_SWI				0x04
#define EICE_VECTOR_CATCH_PREFETCH_ABORT	0x08
#define EICE_VECTOR_CATCH_DATA_ABORT		0x10
#define EICE_VECTOR_CATCH_IRQ				0x40
#define EICE_VECTOR_CATCH_FIQ				0x80

// watch point value & mask bits
#define EICE_WATCHPOINT_ENABLE				0x100	// can't mask this bit
#define EICE_WATCHPOINT_RANGE				0x80	// connect wp1 range output to wp0 range input)
#define EICE_WATCHPOINT_CHAIN				0x40	// connect wp1 chain output to wp0 chain input)
#define EICE_WATCHPOINT_EXTERN				0x20	// external input 0/1
#define EICE_WATCHPOINT_TRANSFER_MODE		0x10	// 0=user mode, 1=privileged mode transfer
#define EICE_WATCHPOINT_DATA				0x08	// 0=instruction breakpoint, 1=data watchpoint
#define EICE_WATCHPOINT_DATA_SIZE_0			0x02	// transfer size bit 0
#define EICE_WATCHPOINT_DATA_SIZE_1			0x04	// transfer size bit 1
#define EICE_WATCHPOINT_DATA_WRITE			0x01	// 0=read, 1=write
#define EICE_WATCHPOINT_INSTR				0x00	// 0=instruction breakpoint, 1=data watchpoint
#define EICE_WATCHPOINT_INSTR_DC_0			0x01	// don't care bit. mask must be set to 1.
#define EICE_WATCHPOINT_INSTR_DC_2			0x04	// don't care bit. mask must be set to 1.
#define EICE_WATCHPOINT_INSTR_ITBIT			0x02	// 0=ARM, 1=THUMB

//////////////////////////////////////////////////////////////////////////////
// EICEChain                                                                //
//////////////////////////////////////////////////////////////////////////////
// Embedded ICE
class EICEChain : public Chain
{
	public:
		// read/write, register 4..0, data 31..0
		unsigned data : 32;
		unsigned address : 5;
		unsigned write : 1;

		void Select() { JTAG::Command(INTEST); JTAG::Chain(EICE_CHAIN); }

		unsigned int Read(unsigned int address)
		{
			this->address = address;
			this->write = 0;
			Select();
			JTAG::Write(this);
			JTAG::Transfer(this);
			return this->data;
		}

		void Write(unsigned int address, unsigned int data)
		{
			this->address = address;
			this->data = data;
			this->write = 1;
			Select();
			JTAG::Write(this);
		}
};