counter8_2.lis
来自「A very good POCSAG Paging Protocol Decod」· LIS 代码 · 共 857 行 · 第 1/4 页
LIS
857 行
0012 ; ARGUMENTS:
0012 ; none.
0012 ;
0012 ; RETURNS:
0012 ; none.
0012 ;
0012 ; SIDE EFFECTS:
0012 ; none.
0012 ;
0012 ; THEORY of OPERATION:
0012 ; Set the start bit in the Control register.
0012 ;
0012 ;-----------------------------------------------------------------------------
0012 Counter8_2_Start:
0012 _Counter8_2_Start:
0012 432F01 or REG[Counter8_2_CONTROL_REG], bfCONTROL_REG_START_BIT
0015 7F ret
0016
0016
0016 ;-----------------------------------------------------------------------------
0016 ; FUNCTION NAME: Counter8_2_Stop
0016 ;
0016 ; DESCRIPTION:
0016 ; Disables counter operation.
0016 ;
0016 ; ARGUMENTS:
0016 ; none.
0016 ;
0016 ; RETURNS:
0016 ; none.
0016 ;
0016 ; SIDE EFFECTS:
0016 ; After this function completes, the Count register will latch any data
0016 ; written to the Period register. Writing to the Period register is
0016 ; performed using the Counter8_2_WritePeriod function.
0016 ;
0016 ; THEORY of OPERATION:
0016 ; Clear the start bit in the Control register.
0016 ;
0016 ;-----------------------------------------------------------------------------
0016 Counter8_2_Stop:
0016 _Counter8_2_Stop:
0016 412FFE and REG[Counter8_2_CONTROL_REG], ~bfCONTROL_REG_START_BIT
0019 7F ret
001A
001A
001A ;-----------------------------------------------------------------------------
001A ; FUNCTION NAME: Counter8_2_WritePeriod
001A ;
001A ; DESCRIPTION:
001A ; Write the period value into the Period register.
001A ;
001A ; ARGUMENTS:
001A ; BYTE bPeriodValue - period count - passed in the Accumulator.
001A ;
001A ; RETURNS:
001A ; none.
001A ;
001A ; SIDE EFFECTS:
001A ; If the counter user module is stopped, then this value will also be
001A ; latched into the Count register.
001A ;
001A ; THEORY of OPERATION:
001A ; Write data into the Period register.
001A ;
001A ;-----------------------------------------------------------------------------
001A Counter8_2_WritePeriod:
001A _Counter8_2_WritePeriod:
001A 492F01 tst REG[Counter8_2_CONTROL_REG], bfCONTROL_REG_START_BIT
001D B019 jnz .CounterRunning
001F
001F ; Counter is stopped. Due to chip errata, we have to set the clock low for
001F ; the write to the period register to cause the data to be immediately transferred
001F ; into the Counter.
001F .CounterStopped:
001F 10 push X
0020 5C mov X, A ; save the period argument
0021 7110 or F, FlagXIOMask
0023 5D2D mov A, REG[Counter8_2_INPUT_REG] ; save the context of the clock - input register
0025 08 push A
0026 412DF0 and REG[Counter8_2_INPUT_REG], F0h ; set the clock signal low
0029 70EF and F, ~FlagXIOMask
002B 5B mov A, X
002C 602D mov REG[Counter8_2_PERIOD_REG], A ; set the period register with the new period
002E 18 pop A
002F 7110 or F, FlagXIOMask
0031 602D mov REG[Counter8_2_INPUT_REG], A ; restore the clock
0033 70EF and F, ~FlagXIOMask
0035 20 pop X
0036 7F ret
0037
0037 ; Counter is running - write the period into the period register.
0037 ; Upon Terminal Count this value will get loaded into the counter.
0037 .CounterRunning:
0037 602D mov REG[Counter8_2_PERIOD_REG], A
0039 7F ret
003A
003A
003A ;-----------------------------------------------------------------------------
003A ; FUNCTION NAME: Counter8_2_WriteCompareValue
003A ;
003A ; DESCRIPTION:
003A ; Writes compare value into the CompareValue register.
003A ;
003A ; ARGUMENTS:
003A ; BYTE bCompareValue - compare value count - passed in Accumulator.
003A ;
003A ; RETURNS:
003A ; none.
003A ;
003A ; SIDE EFFECTS:
003A ; none.
003A ;
003A ; THEORY of OPERATION:
003A ; Write data into the CompareValue register.
003A ;
003A ;-----------------------------------------------------------------------------
003A Counter8_2_WriteCompareValue:
003A _Counter8_2_WriteCompareValue:
003A 602E mov REG[Counter8_2_COMPARE_REG], A
003C 7F ret
003D
003D
003D ;-----------------------------------------------------------------------------
003D ; FUNCTION NAME: bCounter8_2_ReadCompareValue
003D ;
003D ; DESCRIPTION:
003D ; Reads the CompareValue register.
003D ;
003D ; ARGUMENTS:
003D ; none.
003D ;
003D ; RETURNS:
003D ; BYTE bCompareValue - value read from CompareValue register - returned
003D ; in the Accumulator.
003D ;
003D ; SIDE EFFECTS:
003D ; none.
003D ;
003D ; THEORY of OPERATION:
003D ; Read the CompareValue register and return value in A.
003D ;
003D ;-----------------------------------------------------------------------------
003D bCounter8_2_ReadCompareValue:
003D _bCounter8_2_ReadCompareValue:
003D 5D2E mov A, REG[Counter8_2_COMPARE_REG]
003F 7F ret
0040
0040
0040 ;-----------------------------------------------------------------------------
0040 ; FUNCTION NAME: bCounter8_2_ReadCounter
0040 ;
0040 ; DESCRIPTION:
0040 ; Reads the count in the Count register.
0040 ;
0040 ; ARGUMENTS:
0040 ; none.
0040 ;
0040 ; RETURNS:
0040 ; BYTE bCount - current count value in Count register.
0040 ;
0040 ; SIDE EFFECTS:
0040 ; Reading the Count register may cause the Count register to miss
0040 ; one or more counts due to the fact that the clock is stopped while
0040 ; the Count register is read. The preferred method is to use the
0040 ; interrupt feature to determine when the Count has arrived at a
0040 ; specified value.
0040 ;
0040 ; THEORY of OPERATION:
0040 ; Reading the Count register causes its value to be latched into the
0040 ; CompareValue register. Care must be taken to stop the clock and save
0040 ; the CompareValue register's contents before reading the Count.
0040 ;
0040 ;-----------------------------------------------------------------------------
0040 bCounter8_2_ReadCounter:
0040 _bCounter8_2_ReadCounter:
0040
0040 ; save the input register clock setting
0040 7110 or F, FlagXIOMask
0042 5D2D mov A, REG[Counter8_2_INPUT_REG]
0044 08 push A
0045 ; disable the clock
0045 412DF0 and REG[Counter8_2_INPUT_REG], ~bfINPUT_REG_CLOCK_MASK
0048 70EF and F, ~FlagXIOMask
004A
004A ; save the CompareValue register value
004A 5D2E mov A, REG[Counter8_2_COMPARE_REG]
004C 08 push A
004D ; Read the counter. This latches the counter data into
004D ; the CompareValue register. This may cause an interrupt.
004D 5D2C mov A, REG[Counter8_2_COUNTER_REG]
004F ; Read the CompareValue register, which contains the counter value
004F 5D2E mov A, REG[Counter8_2_COMPARE_REG]
0051 ; Save the Count value in X
0051 5C mov X, A
0052 ; Restore the CompareValue register
0052 18 pop A
0053 602E mov REG[Counter8_2_COMPARE_REG], A
0055
0055 ; restore the input register clock setting
0055 7110 or F, FlagXIOMask
0057 18 pop A
0058 602D mov REG[Counter8_2_INPUT_REG], A
005A 70EF and F, ~FlagXIOMask
005C
005C ; Get the saved read counter value
005C 5B mov A, X
005D
005D 7F ret
005E
005E ; end of file
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