📄 boot.lis
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and F, ~FlagXIOMask
mov [_ClockNotStable],CLOCK_STABLE
IF NO_USER_SLEEP_ISR
if DISABLE_INT_FIX
mov A, reg[CPU_SCR] ; save the current Global interrupt state
and F, ~FlagGlobalIE
endif
and reg[INT_MSK0], ~INT_MSK0_Sleep ; disable specified interrupt enable bit
if DISABLE_INT_FIX
and A, CPUSCR_GIEMask ; determine if global interrupt was set
jz . + 4 ; jump if global interrupt disabled
or F, FlagGlobalIE
endif
ENDIF
pop A
reti
ENDIF
IF (PLL_MODE & ~SELECT_32K)
These lines intentionally generate syntax errors to alert you that you
have selected an invalid state. Setting PLL Mode to Ext Lock without
32K_Select set to External is not allowed.
ENDIF
;-----------------------------------------------------------------------------
; Start of Execution
;-----------------------------------------------------------------------------
004F __start:
004F 5000 mov A,__bss_end ;Set top of stack to end of used RAM
0051 4E swap SP,A
0052 ;-------------------------------------------------------------------------
0052 ; Set clock trim if the operating voltage is 3.3V. On power up, 5V is
0052 ; loaded, so this is only needed for 3.3V operation.
0052 ;-------------------------------------------------------------------------
IF (SUPPLY_VOLTAGE) ; 1 means 5.0V
ELSE ; 0 means 3.3V
mov [bSSC_TABLE_TableId], 1 ; Point to the Trim table
mov X, SP ; copy SP into X
mov A, X ; mov to A
add A, 3 ; create 3 byte stack frame
mov [bSSC_KEYSP], A ; save stack frame for supervisory code
mov [bSSC_KEY1], OPER_KEY ; load the supervisory code for supervisory operations
mov A, TABLE_READ ; load A with specific Flash operation
db 0
or F, FlagXIOMask
mov A, [OSCILLATOR_TRIM_3V]
mov reg[IMO_TR], A ; Load the 3V trim oscillator setting
mov A, [VOLTAGE_TRIM_3V]
mov reg[BDG_TR], A ; Load the bandgap trim setting for 3V
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
ELSE
These lines intentionally generate syntax errors to alert you
that you have selected an invalid state. The CPU_CLock cannot
be run at 24 MHz when the chip operating voltage is below 4.75V
ENDIF
ENDIF
;-------------------------------------------------------------------------
; Initialize oscillator register
;-------------------------------------------------------------------------
IF SELECT_32K
;If 32K is set to External, turn the pins used by the crystal to Hi-Z.
;Then, set the sleep timer to 1Hz & reset the sleep timer. (Don't turn
;on the ECO yet, because if the Sleep Timer happens to time out it will
;enable the ECO too soon). Then enable ECO, enable sleep interrupt,
;and initialize ClockNotStable, which can be used as a flag in _main to
;indicate that the clocks are stable. It is also used as a state
;variable for the clock initialization.
or F, FlagXIOMask
mov reg[PRT1DM0],00h ;P1[0] & P1[1] Drive Mode to High Z because
mov reg[PRT1DM1],03h ; LoadConfigInit not run yet.
mov reg[ECO_TR],0Fh ;adjust ECO trim
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
; set sleep to 1 sec and CPU to 12MHz during configuration
mov reg[OSC_CR0], (OSC_CR0_CPU_12MHz | OSC_CR0_Sleep_1Hz)
ELSE
; set sleep to 1 sec and CPU to 24MHz
mov reg[OSC_CR0], (OSC_CR0_CPU_24MHz | OSC_CR0_Sleep_1Hz)
ENDIF
and F, ~FlagXIOMask
mov reg[RES_WDT], 38h
or F, FlagXIOMask
or reg[OSC_CR0],SELECT_32K_JUST ;enable the ECO
and F, ~FlagXIOMask
or reg[INT_MSK0], INT_MSK0_Sleep
mov [ClockNotStable],FIRST_TIME ;initialize ClockNotStable
ELSE ; If 32K is set to Internal, then no further initialization needed
0052 7110 or F, FlagXIOMask
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
; set sleep to 1 sec and CPU to 12MHz during configuration
mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz)
ELSE
; set sleep to 1 sec and CPU to 24MHz
0054 62E01B mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST )
ENDIF
0057 70EF and F, ~FlagXIOMask
ENDIF
; default CT block RTopMux to OUT and RBotMux to AGND
0059 627105 mov reg[ACA00CR0],05h
005C 627505 mov reg[ACA01CR0],05h
005F 627905 mov reg[ACA02CR0],05h
0062 627D05 mov reg[ACA03CR0],05h
0065 7C0000 lcall LoadConfigInit ;Configure PSoC blocks per Dev Editor
0068
IF C_LANGUAGE_SUPPORT
0068 9008 call InitCRunTime ;Initialize for C language
ENDIF
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
; Set the CPU clock to the user's selection
or F, FlagXIOMask
mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
and F, ~FlagXIOMask
ENDIF
006A 62E200 mov reg[INT_VC],0 ;Clear any pending interrupts which may
006D ; have been set during the boot process.
IF SELECT_32K
or F, FlagGlobalIE
ENDIF
006D 7C0000 lcall _main ;Call main
0070 _exit:
0070 8FFF jmp _exit
0072
IF C_LANGUAGE_SUPPORT
;-----------------------------------------------------------------------------
;; C Runtime Environment Initialization
;-----------------------------------------------------------------------------
0072 InitCRunTime:
0072 ;-----------------------------
0072 ; clear bss segment
0072 ;-----------------------------
0072 5000 mov A,0
0074 550000 mov [__r0],<__bss_start
0077 BssLoop:
0077 3C0000 cmp [__r0],<__bss_end
007A A005 jz BssDone
007C 3F00 mvi [__r0],A
007E 8FF8 jmp BssLoop
0080 BssDone:
0080 ;----------------------------
0080 ; copy idata to data segment
0080 ;----------------------------
0080 5000 mov A,>__idata_start
0082 5700 mov X,<__idata_start
0084 550000 mov [__r0],<__data_start
0087 IDataLoop:
0087 3C0000 cmp [__r0],<__data_end
008A A00B jz IDataDone
008C 08 push A
008D 28 romx
008E 3F00 mvi [__r0],A
0090 18 pop A
0091 75 inc X
0092 0900 adc A,0
0094 8FF2 jmp IDataLoop
0096 IDataDone:
0096 7F ret
0097
ENDIF
;------------------------------------------------------
;; RAM segments for C CONST, static & global items
;------------------------------------------------------
AREA lit
0000 __lit_start:
0000
AREA idata
0000 __idata_start:
0000
AREA func_lit
0000 __func_lit_start:
0000
0000 ;---------------------------------------------
0000 ; CODE segment for general use
0000 ;---------------------------------------------
AREA text(rom)
0000 __text_start:
0000
0000 ;---------------------------------------------
0000 ; Begin RAM area usage
0000 ;---------------------------------------------
AREA data(ram)
0000 __data_start:
0000
AREA virtual_registers(ram)
0000 __virtual_registers_end:
0000
IF SELECT_32K ;Used to track initialization of ECO and PLL
AREA eco_pll(ram)
ClockNotStable:
_ClockNotStable: BLK 1
ENDIF
;---------------------------------------------
; RAM segment for general use
;---------------------------------------------
AREA bss(ram)
0000 __bss_start:
0000
0000 ; end of file
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