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📄 boot.lis

📁 A very good POCSAG Paging Protocol Decoder.
💻 LIS
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 0000           ;
 0000           ;  RETURNS:
 0000           ;     none.
 0000           ;
 0000           ;  SIDE EFFECTS:
 0000           ;     A and X registers are destroyed
 0000           ;
 0000           ;  PROCEDURE:  
 0000           ;     1) specify a 3 byte stack frame.  Save in [KEYSP]
 0000           ;     2) insert the flash Supervisory key in [KEY1]
 0000           ;     3) store function code in A
 0000           ;     4) call the supervisory code
 0000           ;-----------------------------------------------------------------------------
 0000           macro SSC_Action  
 0000                 mov   X, SP                         ; copy SP into X
 0000                 mov   A, X                          ; mov to A
 0000                 add   A, 3                          ; create 3 byte stack frame
 0000                 mov   [bSSC_KEYSP], A               ; save stack frame for supervisory code
 0000                 mov   [bSSC_KEY1], OPER_KEY                 ; load the supervisory code for supervisory operations
 0000                 mov   A, @0                         ; load A with specific Flash operation
 0000                 SSC                                 ; SSC call the supervisory code
 0001           C_LANGUAGE_SUPPORT: equ 1         ;Set to 0 to optimize for ASM only
 0000           
 0000           ;-----------------------------------------------------------------------------
 0000           ; Export Declarations
 0000           ;-----------------------------------------------------------------------------
 0000           
                export __start
                export _exit
                export __bss_start
                
                export __lit_start
                export __idata_start
                export __data_start
                export __func_lit_start
                export __text_start
                
                
                ;-----------------------------------------------------------------------------
                ; Interrupt Vector Table
                ;-----------------------------------------------------------------------------
                ;
                ; Interrupt vector table entries are 4 bytes long and contain the code
                ; that services the interrupt (or causes it to be serviced).
                ;
                ;-----------------------------------------------------------------------------
                
                
                    AREA    TOP(ROM, ABS)
                
                    org 0                         ;Reset Interrupt Vector
 0000 804E          jmp __start                   ;First instruction executed following a Reset
 0002           
                    org 04h                       ;Supply Monitor Interrupt Vector
 0004 30            halt                          ;Stop execution if power falls too low
 0005 7E            reti
 0006           
                    org 08h                       ;PSoC Block DBA00 Interrupt Vector
 0008 7D0000        ljmp        TIMER8_1_ISR          ;Timer interrupt routine
 000B 7E            reti
 000C           
                    org 0Ch                       ;PSoC Block DBA01 Interrupt Vector
                    // call     void_handler
 000C 7E            reti
 000D           
                    org 10h                       ;PSoC Block DBA02 Interrupt Vector
                    // call     void_handler
 0010 7E            reti
 0011           
                    org 14h                       ;PSoC Block DBA03 Interrupt Vector
 0014 7D0000        ljmp        Counter8_2INT
 0017 7E            reti
 0018           
                    org 18h                       ;PSoC Block DCA04 Interrupt Vector
 0018 7D0000        ljmp        TX8_1INT
 001B 7E            reti
 001C           
                    org 1Ch                       ;PSoC Block DCA05 Interrupt Vector
                    // call     void_handler
 001C 7E            reti
 001D           
                    org 20h                       ;PSoC Block DCA06 Interrupt Vector
                    // call     void_handler
 0020 7E            reti
 0021           
                    org 24h                       ;PSoC Block DCA07 Interrupt Vector
                    // call     void_handler
 0024 7E            reti
 0025           
                    org 28h                       ;Analog Column 0 Interrupt Vector
 0028 7D0000        ljmp    COMP_ISR              ;comparator interrupt routine
 002B 7E            reti
 002C           
                    org 2Ch                       ;Analog Column 1 Interrupt Vector
                    // call     void_handler
 002C 7E            reti
 002D           
                    org 30h                       ;Analog Column 2 Interrupt Vector
                    // call     void_handler
 0030 7E            reti
 0031           
                    org 34h                       ;Analog Column 3 Interrupt Vector
                    // call     void_handler
 0034 7E            reti
 0035           
                    org 38h                       ;GPIO Interrupt Vector
 0038 7D0000        ljmp        GPIO_ISR              ;input port interrupt routine
 003B 7E            reti
 003C           
                    org 3Ch                       ;Sleep Timer Interrupt Vector
 003C 8002          jmp SleepTimerISR
 003E 7E            reti
 003F           
 003F           ;-----------------------------------------------------------------------------
 003F           ;  Sleep Timer ISR
 003F           ;-----------------------------------------------------------------------------
 003F           ;  This code uses conditional compiler flags to enable code to initialize the 
 003F           ;  External Crystal Oscillator (ECO) and the PLL_Lock mode of the Internal 
 003F           ;  Main Oscillator (IMO).  If the ECO and the IMO PLL_Lock mode are not used,
 003F           ;  the initialization code is not compiled.
 003F           ;-----------------------------------------------------------------------------
                IF SELECT_32K
                    export  _ClockNotStable
                    FIRST_TIME:       equ  2h
                    SECOND_TIME:      equ  1h
                    CLOCK_STABLE:     equ  0h
                ENDIF
                
 003F           SleepTimerISR:
 003F 08            push A
 0040           
 0000               NO_USER_SLEEP_ISR:  equ  0    ;Change this equate to 0 if adding ISR
 0040           	//Sleep timer interrupt is used only ones during power-on test. //
 0040           	// See NOTES at the top of this file.           //
 0040           
                    IF SELECT_32K
                        mov A,[ClockNotStable]    ;ClockNotStable is also state of clock init
                        jz   NormalSleep
                        IF PLL_MODE        
                            dec A
                            jz  SecondTime        ;This case is only needed if PLL_Lock
                        ENDIF
                            jmp  FirstTime        ;This case is only needed if the ECO is used
                    ENDIF
                
 0040           NormalSleep:
 0040 18            pop A                         ;normal sleep 
                if DISABLE_INT_FIX
 0041 5DFF          mov   A, reg[CPU_SCR]           ; save the current Global interrupt state
 0043 70FE          and   F, ~FlagGlobalIE
                endif
 0045 41E0BF        and   reg[INT_MSK0], ~INT_MSK0_Sleep              ; disable specified interrupt enable bit
                if DISABLE_INT_FIX
 0048 2180          and   A, CPUSCR_GIEMask         ; determine if global interrupt was set
 004A A003          jz    . + 4                     ; jump if global interrupt disabled
 004C 7101          or    F, FlagGlobalIE
                endif
 004E 7E            reti
 004F           
                   IF SELECT_32K
                   FirstTime:
                   ; 1st time through the SleepISR. Will arrive here 1 second after boot
                   ; the External Crystal Oscillator (ECO) is now stable.
                   ; If both ECO and PLL_Lock, then turn on PLL_Lock and wait for it to 
                   ; stabilize. Set SleepClock to 64 Hz, set PLL Mode bit, set CPU_Clock to
                   ; 3 MHz, set ClockNotStable to SECOND_TIME. The clock initialization is
                   ; not yet complete.
                   ; If ECO but not PLL_Lock, set SleepClock to user selection, set 
                   ; ClockNotStable to CLOCK_STABLE. The clock initialization is complete.
                
                      IF PLL_MODE
                    or    F, FlagXIOMask
                         IF (CPU_CLOCK_JUST & 04h)   ;CPU setting in Device Editor is <3MHz
                            ;Enable PLL, set sleep timer to 64Hz and CPU per Device Editor
                            mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_Sleep_64Hz |CPU_CLOCK_JUST)
                         ELSE             ;CPU setting in Device Editor is >=3MHz
                            ;Enable PLL, set sleep timer to 64Hz and CPU clock to 3MHz
                            mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | OSC_CR0_Sleep_64Hz | OSC_CR0_CPU_3MHz)
                         ENDIF
                    and   F, ~FlagXIOMask
                         mov [ClockNotStable],SECOND_TIME
                      ELSE
                         ;Set the sleep timer, PLL (disabled) & CPU per Device Editor
                    or    F, FlagXIOMask
                         mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
                    and   F, ~FlagXIOMask
                         mov [ClockNotStable],CLOCK_STABLE
                         IF NO_USER_SLEEP_ISR     ;turn off Sleep Int if no longer needed
                if DISABLE_INT_FIX
                    mov   A, reg[CPU_SCR]           ; save the current Global interrupt state
                    and   F, ~FlagGlobalIE
                endif
                    and   reg[INT_MSK0], ~INT_MSK0_Sleep              ; disable specified interrupt enable bit
                if DISABLE_INT_FIX
                    and   A, CPUSCR_GIEMask         ; determine if global interrupt was set
                    jz    . + 4                     ; jump if global interrupt disabled
                    or    F, FlagGlobalIE
                endif
                         ENDIF
                      ENDIF
                      pop A
                      reti
                   ENDIF
                   
                   IF PLL_MODE
                SecondTime:    
                      ; 2nd time through SleepISR. Compiled only if PLL_Mode set to Ext Lock
                    or    F, FlagXIOMask
                      ; Set the sleep timer and CPU per Device Editor
                      mov reg[OSC_CR0],(SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)

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