test_ppi.ldf

驱动ppi

   
} /* MEMORY */

PROCESSOR p0
{
   OUTPUT($COMMAND_LINE_OUTPUT_FILE)
   RESOLVE(start, 0xFFA08000)
   KEEP(start,_main)
   
   /*$VDSG<insert-user-ldf-commands>                            */
   /* Text inserted between these $VDSG comments will be preserved */
   /*$VDSG<insert-user-ldf-commands>                            */
   
   SECTIONS
   {
      /* Workaround for hardware errata 05-00-0189 and 05-00-0310 -
      ** "Speculative (and fetches made at boundary of reserved memory
      ** space) for instruction or data fetches may cause false
      ** protection exceptions" and "False hardware errors caused by
      ** fetches at the boundary of reserved memory ".
      **
      ** Done by avoiding use of 76 bytes from at the end of blocks
      ** that are adjacent to reserved memory. Workaround is enabled
      ** for appropriate silicon revisions (-si-revision switch).
      */
      RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76)
      RESERVE(___wab1=MEMORY_END(MEM_L1_CODE_CACHE) - 75, ___l1 = 76)
      RESERVE(___wab2=MEMORY_END(MEM_L1_CODE) - 75, ___l2 = 76)
      RESERVE(___wab3=MEMORY_END(MEM_L1_DATA_A_CACHE) - 75, ___l3 = 76)
      RESERVE(___wab5=MEMORY_END(MEM_ASYNC3) - 75, ___l5 = 76)
      RESERVE(___wab6=MEMORY_END(MEM_SDRAM0_BANK3) - 75, ___l8 = 76)
      
      /*$VDSG<insert-new-sections-at-the-start>                 */
      /* Text inserted between these $VDSG comments will be preserved */
      /*$VDSG<insert-new-sections-at-the-start>                 */
      
      scratchpad NO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         
         /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
         
         
         /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
         
      } > MEM_L1_SCRATCH

      L1_code
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code))
         
         /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
         
         INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
         INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
         INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program))
         INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
         
         /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
         
      } > MEM_L1_CODE

      L1_code_cache
      {
         INPUT_SECTION_ALIGN(4)
         ___l1_code_cache = 1;
      } > MEM_L1_CODE_CACHE

      L1_data_a_cache
      {
         INPUT_SECTION_ALIGN(4)
         ___l1_data_cache_a = 1;
         ___l1_data_cache_b = 0;
      } > MEM_L1_DATA_A_CACHE

      
      /*$VDSG<customise-sdram-section-partition>                */
      /* This code is preserved if the LDF is re-generated.     */
      HEAP
      {
         INPUT_SECTION_ALIGN(4)
         RESERVE(heaps_and_stack_in_L3, heaps_and_stack_in_L3_length = 5K,4)
         RESERVE_EXPAND(heaps_and_stack_in_L3, heaps_and_stack_in_L3_length , 0, 4)
         ldf_heap_space = heaps_and_stack_in_L3;
         ldf_heap_end = (ldf_heap_space + (((heaps_and_stack_in_L3_length * 5K) / 5K) - 4)) & 0xfffffffc;
         ldf_heap_length = ldf_heap_end - ldf_heap_space;
      } > MEM_SDRAM0_HEAP

      STACK
      {
         INPUT_SECTION_ALIGN(4)
         RESERVE(heaps_and_stack_in_L3_bank1, heaps_and_stack_in_L3_bank1_length = 8K,4)
         RESERVE_EXPAND(heaps_and_stack_in_L3_bank1, heaps_and_stack_in_L3_bank1_length , 0, 4)
         ldf_stack_space = heaps_and_stack_in_L3_bank1;
         ldf_stack_end = (ldf_stack_space + (((heaps_and_stack_in_L3_bank1_length * 8K) / 8K) - 4)) & 0xfffffffc;
      } > MEM_SDRAM0_STACK

      MANAGE
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
         INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
         INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
         INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
         INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
         INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data))
      } > MEM_SDRAM0_MANAGE
     
      sdram0_bank0
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0))
         INPUT_SECTIONS($OBJECTS(sdram0_bank3) $LIBRARIES(sdram0_bank3))
         
         
         INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
         INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
         INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
      } > MEM_SDRAM0_BANK0
      
      sdram0_bank1
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0))
         INPUT_SECTIONS($OBJECTS(sdram0_bank1) $LIBRARIES(sdram0_bank1))
         INPUT_SECTIONS($OBJECTS(sdram0_data) $LIBRARIES(sdram0_data))
      } > MEM_SDRAM0_BANK1
      
      sdram0_bank1_bsz ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram_bsz) $LIBRARIES(sdram_bsz))
         INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
      } > MEM_SDRAM0_BANK1

      sdram0_bank1_stack_heap
      {
         INPUT_SECTION_ALIGN(4)
         RESERVE_EXPAND(heaps_and_stack_in_L3_bank1, heaps_and_stack_in_L3_bank1_length , 0, 4)
      } > MEM_SDRAM0_BANK1

      sdram0_bank2
      {
         INPUT_SECTION_ALIGN(4)
         FORCE_CONTIGUITY
         INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0))
         INPUT_SECTIONS($OBJECTS(sdram0_bank2) $LIBRARIES(sdram0_bank2))
         INPUT_SECTIONS($OBJECTS(sdram0_data) $LIBRARIES(sdram0_data))
         INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
         INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
         INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
         INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
         INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl))
         INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor))
         INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl))
         INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt))
         INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti))
         INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt))
         INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl))
         INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt))
         INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht))
      } > MEM_SDRAM0_BANK2

      sdram0_bank2_bsz ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram_bsz) $LIBRARIES(sdram_bsz))
         INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
      } > MEM_SDRAM0_BANK2

      FRAME1 RUNTIME_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(FrameBuffer1))
      } > MEM_SDRAM0_BANK3

      FRAME2 RUNTIME_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(FrameBuffer2))
      } > MEM_SDRAM0_BANK4

      /*$VDSG<customise-sdram-section-partition>                */
      
      
      /*$VDSG<insert-new-sections-at-the-end>                   */
      /* Text inserted between these $VDSG comments will be preserved */
      /*$VDSG<insert-new-sections-at-the-end>                   */
      
   } /* SECTIONS */
} /* p0 */