test_ppi.ldf

驱动ppi

/* MANAGED-BY-SYSTEM-BUILDER                                    */

/*
** ADSP-BF531 linker description file generated on Dec 14, 2007 at 10:32:30.
**
** Copyright (C) 2000-2007 Analog Devices Inc., All Rights Reserved.
**
** This file is generated automatically based upon the options selected
** in the LDF Wizard. Changes to the LDF configuration should be made by
** changing the appropriate options rather than editing this file.
**
** Configuration:-
**     crt_doj:                                .\Debug\test_ppi_basiccrt.doj
**     processor:                              ADSP-BF531
**     si_revision:                            automatic
**     cplb_init_cplb_ctrl:                    (
**                                              CPLB_ENABLE_ICACHE
**                                              CPLB_ENABLE_DCACHE
**                                              CPLB_ENABLE_CPLBS
**                                              CPLB_ENABLE_ICPLBS
**                                              CPLB_ENABLE_DCPLBS
**                                             )
**     using_cplusplus:                        false
**     mem_init:                               false
**     use_vdk:                                false
**     use_eh:                                 true
**     use_argv:                               false
**     running_from_internal_memory:           true
**     user_heap_src_file:                     E:\test_ppi\test_ppi_heaptab.c
**     libraries_use_stdlib:                   true
**     libraries_use_fileio_libs:              false
**     libraries_use_ieeefp_emulation_libs:    false
**     libraries_use_eh_enabled_libs:          false
**     system_heap:                            L3
**     system_heap_min_size:                   5K
**     system_stack:                           L3
**     system_stack_min_size:                  8K
**     use_sdram:                              true
**     use_sdram_size:                         16M
**     use_sdram_partitioned:                  custom
**
*/

ARCHITECTURE(ADSP-BF531)

SEARCH_DIR($ADI_DSP/Blackfin/lib)


// Workarounds are enabled, exceptions are disabled.
#define RT_LIB_NAME(x) lib ## x ## y.dlb
#define RT_LIB_NAME_EH(x) lib ## x ## y.dlb
#define RT_LIB_NAME_MT(x) lib ## x ## y.dlb
#define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb
#define RT_OBJ_NAME(x) x ## y.doj
#define RT_OBJ_NAME_MT(x) x ## mty.doj


$LIBRARIES = 

/*$VDSG<insert-user-libraries-at-beginning>                     */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-libraries-at-beginning>                     */

   RT_LIB_NAME_MT(small532)
   ,RT_LIB_NAME_MT(io532)
   ,RT_LIB_NAME_MT(c532)
   ,RT_LIB_NAME_MT(event532)
   ,RT_LIB_NAME_MT(x532)
   ,RT_LIB_NAME(f64ieee532)
   ,RT_LIB_NAME(dsp532)
   ,RT_LIB_NAME(sftflt532)
   ,RT_LIB_NAME(etsi532)
   ,RT_LIB_NAME(ssl532)
   ,RT_LIB_NAME(drv532)
   ,RT_LIB_NAME(usb532)
   ,RT_OBJ_NAME_MT(idle532)
   ,RT_LIB_NAME_MT(rt_fileio532)

/*$VDSG<insert-user-libraries-at-end>                           */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-libraries-at-end>                           */

   ;

$OBJECTS = 
   ".\Debug\test_ppi_basiccrt.doj"

/*$VDSG<insert-user-objects-at-beginning>                       */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-objects-at-beginning>                       */

   , RT_LIB_NAME(profile532)
   , $COMMAND_LINE_OBJECTS
   , "cplbtab531.doj"

/*$VDSG<insert-user-objects-at-end>                             */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-objects-at-end>                             */

   ;

$OBJS_LIBS_INTERNAL = 

/*$VDSG<insert-libraries-internal>                              */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-internal>                              */

   $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")}

/*$VDSG<insert-libraries-internal-end>                          */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-internal-end>                          */

   ;

$OBJS_LIBS_NOT_EXTERNAL = 

/*$VDSG<insert-libraries-not-external>                          */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-not-external>                          */

   $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")}

/*$VDSG<insert-libraries-not-external-end>                      */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-not-external-end>                      */

   ;


/*$VDSG<insert-user-macros>                                     */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-macros>                                     */


/*$VDSG<customise-async-macros>                                 */
/* This code is preserved if the LDF is re-generated.           */


#define ASYNC0_MEMTYPE RAM
#define ASYNC1_MEMTYPE RAM
#define ASYNC2_MEMTYPE RAM
#define ASYNC3_MEMTYPE RAM


/*$VDSG<customise-async-macros>                                 */


MEMORY
{
/*
** ADSP-BF531 MEMORY MAP.
** 0xFFE00000 - 0xFFFFFFFF  Core MMR registers (2MB)
** 0xFFC00000 - 0xFFDFFFFF  System MMR registers (2MB)
** 0xFFB01000 - 0xFFBFFFFF  Reserved
** 0xFFB00000 - 0xFFB00FFF  Scratch SRAM (4K)
** 0xFFA14000 - 0xFFAFFFFF  Reserved
** 0xFFA10000 - 0xFFA13FFF  Code SRAM / cache (16K)
** 0xFFA00000 - 0xFFA0FFFF  Code SRAM (32K)
** 0xFFA00000 - 0xFFA07FFF  Code ROM (32K)
** 0xFF908000 - 0xFF9FFFFF  Reserved
** 0xFF904000 - 0xFF907FFF  Reserved
** 0xFF808000 - 0xFF903FFF  Reserved
** 0xFF804000 - 0xFF807FFF  Data Bank A SRAM / cache (16K)
** 0xFF800000 - 0xFF803FFF  Reserved
** 0xEF000000 - 0xFF7FFFFF  Reserved
** 0x20400000 - 0xEEFFFFFF  Reserved
** 0x20300000 - 0x203FFFFF  ASYNC MEMORY BANK 3 (1MB)
** 0x20200000 - 0x202FFFFF  ASYNC MEMORY BANK 2 (1MB)
** 0x20100000 - 0x201FFFFF  ASYNC MEMORY BANK 1 (1MB)
** 0x20000000 - 0x200FFFFF  ASYNC MEMORY BANK 0 (1MB)
** 0x00000000 - 0x07FFFFFF  SDRAM MEMORY (16MB - 128MB)
**
** Note:
**   0xFF807FDF-0xFF807FFF used by boot-loader for 0.2 silicon.
**   0xFF807FEF-0xFF807FFF used by boot-loader for 0.3 and later silicon.
**
*/

   MEM_SYS_MMRS            { TYPE(RAM) START(0xFFC00000) END(0xFFDFFFFF) WIDTH(8) }
   MEM_L1_SCRATCH          { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) }
   MEM_L1_CODE_CACHE       { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) }
   MEM_L1_CODE             { TYPE(RAM) START(0xFFA08000) END(0xFFA0BFFF) WIDTH(8) }
   MEM_L1_DATA_A_CACHE     { TYPE(RAM) START(0xFF804000) END(0xFF807FFF) WIDTH(8) }
   MEM_ASYNC3              { TYPE(ASYNC3_MEMTYPE) START(0x20300000) END(0x203FFFFF) WIDTH(8) }
   MEM_ASYNC2              { TYPE(ASYNC2_MEMTYPE) START(0x20200000) END(0x202FFFFF) WIDTH(8) }
   MEM_ASYNC1              { TYPE(ASYNC1_MEMTYPE) START(0x20100000) END(0x201FFFFF) WIDTH(8) }
   MEM_ASYNC0              { TYPE(ASYNC0_MEMTYPE) START(0x20000000) END(0x200FFFFF) WIDTH(8) }
   
   /*$VDSG<customise-sdram-mem-partition>                       */
   /* This code is preserved if the LDF is re-generated.        */
   
   MEM_SDRAM0_MANAGE       { TYPE(RAM) START(0x00000004) END(0x000fbfff) WIDTH(8) }
   MEM_SDRAM0_HEAP         { TYPE(RAM) START(0x000fc000) END(0x000fdfff) WIDTH(8) }
   MEM_SDRAM0_STACK        { TYPE(RAM) START(0x000fe000) END(0x000fffff) WIDTH(8) }
   
   MEM_SDRAM0_BANK0        { TYPE(RAM) START(0x00100000) END(0x003fffff) WIDTH(8) } 
   MEM_SDRAM0_BANK1        { TYPE(RAM) START(0x00400000) END(0x004fffff) WIDTH(8) } 
   MEM_SDRAM0_BANK2        { TYPE(RAM) START(0x00500000) END(0x007fffff) WIDTH(8) } 
   MEM_SDRAM0_BANK3        { TYPE(RAM) START(0x00800000) END(0x00bfffff) WIDTH(8) } 
   MEM_SDRAM0_BANK4        { TYPE(RAM) START(0x00c00000) END(0x00ffffff) WIDTH(8) } 
   /*$VDSG<customise-sdram-mem-partition>                       */
   
   
   /*$VDSG<insert-new-memory-segments>                          */
   /* Text inserted between these $VDSG comments will be preserved */
   /*$VDSG<insert-new-memory-segments>                          */