📄 irq.h
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/*! \file include/lnp/sys/irq.h \brief Internal LNP Interface: RCX redirected IRQ vectors \author Markus L. Noga <markus@noga.de> Lego Mindstorms RCX IRQ redirection vector table All redirected handlers can assume r6 to be saved All redirected handlers must return with rts, *not* rte. \warning Incomplete.*//* * The contents of this file are subject to the Mozilla Public License * Version 1.0 (the "License"); you may not use this file except in * compliance with the License. You may obtain a copy of the License * at http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and * limitations under the License. * * The Original Code is legOS code, released October 17, 1999. * * The Initial Developer of the Original Code is Markus L. Noga. * Portions created by Markus L. Noga are Copyright (C) 1999 * Markus L. Noga. All Rights Reserved. * * Contributor(s): Markus L. Noga <markus@noga.de> */#ifndef __sys_irq_h__#define __sys_irq_h__#ifdef __cplusplusextern "C" {#endif/////////////////////////////////////////////////////////////////////////// Definitions/////////////////////////////////////////////////////////////////////////#ifdef CONF_RCX_COMPILER#define HANDLER_WRAPPER(wrapstring,handstring)#else#define HANDLER_WRAPPER(wrapstring,handstring) \__asm__ (".text\n.align 1\n.global _" wrapstring "\n_" wrapstring \": push r0\npush r1\npush r2\npush r3\njsr @_" handstring \"\npop r3\npop r2\npop r1\npop r0\nrts\n")#endif/////////////////////////////////////////////////////////////////////////// Variables/////////////////////////////////////////////////////////////////////////extern void *reset_vector; //!< reset vectorextern void *nmi_vector; //!< NMI interrupt vectorextern void *irq0_vector; //!< IRQ0 interrupt vectorextern void *irq1_vector; //!< IRQ1 interrupt vectorextern void *irq2_vector; //!< IRQ2 interrupt vectorextern void *icia_vector; //!< ICIA interrupt vectorextern void *icib_vector; //!< ICIB interrupt vectorextern void *icic_vector; //!< ICIC interrupt vectorextern void *icid_vector; //!< ICID interrupt vectorextern void *ocia_vector; //!< OCIA interrupt vectorextern void *ocib_vector; //!< OCIB interrupt vectorextern void *fovi_vector; //!< FOVI interrupt vectorextern void *cmi0a_vector; //!< CMI0A interrupt vectorextern void *cmi0b_vector; //!< CMI0B interrupt vectorextern void *ovi0_vector; //!< OVI0 interrupt vectorextern void *cmi1a_vector; //!< CMI1A interrupt vectorextern void *cmi1b_vector; //!< CMI1B interrupt vectorextern void *ovi1_vector; //!< OVI1 interrupt vectorextern void *eri_vector; //!< ERI interrupt vectorextern void *rxi_vector; //!< RXI interrupt vectorextern void *txi_vector; //!< TXI interrupt vectorextern void *tei_vector; //!< TEI interrupt vectorextern void *ad_vector; //!< A/D interrupt vectorextern void *wovf_vector; //!< WOVF interrupt vectorextern void *rom_reset_vector; //!< ROM reset vectorextern void rom_ocia_handler(); //!< ROM OCIA interrupt handlerextern void rom_ocia_return(); //!< return address in ROM OCIA handlerextern void rom_dummy_handler(); //!< address of an RTS instruction/////////////////////////////////////////////////////////////////////////// Functions///////////////////////////////////////////////////////////////////////////! disable interrupt processingextern inline void disable_irqs() { __asm__ __volatile__("\torc #0x80,ccr\n":::"cc");}//! enable interrupt processingextern inline void enable_irqs() { __asm__ __volatile__("\tandc #0x7f,ccr\n":::"cc");}#ifdef __cplusplus}#endif#endif // __sys_irq_h__
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