ar5xxx.h

无线网卡驱动 固件程序 There are currently 3 "programming generations" of Atheros 802.11 wireless devices (

typedef struct {
	u_int32_t	bs_next_beacon;
	u_int32_t	bs_next_dtim;
	u_int32_t	bs_interval;
	u_int8_t	bs_dtim_period;
	u_int8_t	bs_cfp_period;
	u_int16_t	bs_cfp_max_duration;
	u_int16_t	bs_cfp_du_remain;
	u_int16_t	bs_tim_offset;
	u_int16_t	bs_sleep_duration;
	u_int16_t	bs_bmiss_threshold;
	u_int32_t  	bs_cfp_next;

#define bs_nexttbtt		bs_next_beacon
#define bs_intval		bs_interval
#define bs_nextdtim		bs_next_dtim
#define bs_bmissthreshold	bs_bmiss_threshold
#define bs_sleepduration	bs_sleep_duration
#define bs_dtimperiod		bs_dtim_period
#define bs_timoffset		bs_tim_offset
#define bs_cfpperiod		bs_cfp_period
#define bs_cfpmaxduration	bs_cfp_max_duration
#define bs_cfpnext		bs_cfp_next

} HAL_BEACON_STATE;

/*
 * Power management
 */

typedef enum {
	HAL_PM_UNDEFINED = 0,
	HAL_PM_AUTO,
	HAL_PM_AWAKE,
	HAL_PM_FULL_SLEEP,
	HAL_PM_NETWORK_SLEEP,
} HAL_POWER_MODE;

/*
 * Weak wireless crypto definitions (use IPsec/WLSec/...)
 */
typedef enum {
	HAL_CIPHER_WEP		= 0,
	HAL_CIPHER_AES_OCB	= 1,
	HAL_CIPHER_AES_CCM	= 2,
	HAL_CIPHER_CKIP		= 3,
	HAL_CIPHER_TKIP		= 4,
	HAL_CIPHER_CLR		= 5,		/* no encryption */
	HAL_CIPHER_MIC		= 127		/* TKIP-MIC, not a cipher */
} HAL_CIPHER;

#define AR5K_KEYVAL_LENGTH_40	5
#define AR5K_KEYVAL_LENGTH_104	13
#define AR5K_KEYVAL_LENGTH_128	16
#define AR5K_KEYVAL_LENGTH_MAX	AR5K_KEYVAL_LENGTH_128

typedef struct {
	int		wk_len;
	u_int8_t	wk_key[AR5K_KEYVAL_LENGTH_MAX];

	u_int8_t	kv_type;	/* one of HAL_CIPHER */
//	u_int8_t	kv_pad;
//	u_int16_t	kv_len;		/* length in bits */
//	u_int8_t	kv_val[16];	/* enough for 128-bit keys */
	u_int8_t	kv_mic[8];	/* TKIP MIC key */

#define kv_len wk_len
#define kv_val	wk_key

} HAL_KEYVAL;

#define	HAL_RSSI_EP_MULTIPLIER	(1<<7)

#define AR5K_ASSERT_ENTRY(_e, _s) do {		\
	if (_e >= _s)							\
		return (AH_FALSE);					\
} while (0)

/*
 * PHY
 */

typedef enum {
	HAL_ANT_VARIABLE 	= 0,		/* variable by programming */
	HAL_ANT_FIXED_A 	= 1,		/* fixed to 11a frequencies */
	HAL_ANT_FIXED_B 	= 2,		/* fixed to 11b frequencies */
	HAL_ANT_MAX 		= 3,
} HAL_ANT_SETTING;

#define AR5K_MAX_RATES	32

typedef struct {
		u_int8_t	valid;			/* valid for rate control use */
		u_int8_t	phy;			/* CCK/OFDM/XR */
		u_int16_t	rateKbps;		/* transfer rate in kbs */
		u_int8_t	rateCode;		/* rate for h/w descriptors */

		u_int8_t	shortPreamble;		/* mask for enabling short
							* preamble in CCK rate code */

		u_int8_t	dot11Rate;		/* value for supported rates
							* info element of MLME */

		u_int8_t	controlRate;		/* index of next lower basic
							* rate; used for dur. calcs */

		u_int16_t	lpAckDuration;		/* long preamble ACK duration */
		u_int16_t	spAckDuration;		/* short preamble ACK duration*/

#define r_valid			valid
#define r_phy			phy
#define r_rate_kbps		rateKbps
#define r_rate_code		rateCode
#define r_short_preamble	shortPreamble
#define r_dot11_rate		dot11Rate
#define r_control_rate		controlRate

} HAL_RATE;

typedef struct {
	u_int16_t	rateCount;				/* NB: for proper padding */
	u_int8_t	rateCodeToIndex[AR5K_MAX_RATES];	/* back mapping */
	HAL_RATE	info[AR5K_MAX_RATES];			/* rates */

#define rt_rate_count		rateCount
#define rt_rate_code_index	rateCodeToIndex
#define rt_info			info

} HAL_RATE_TABLE;

#define AR5K_RATES_11A { 8, {					\
	255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0,	\
	7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255,	\
	255, 255, 255, 255, 255, 255, 255, 255 }, {		\
	{ 1, IEEE80211_T_OFDM, 6000, 11, 0, 140, 0 },		\
	{ 1, IEEE80211_T_OFDM, 9000, 15, 0, 18, 0 },		\
	{ 1, IEEE80211_T_OFDM, 12000, 10, 0, 152, 2 },		\
	{ 1, IEEE80211_T_OFDM, 18000, 14, 0, 36, 2 },		\
	{ 1, IEEE80211_T_OFDM, 24000, 9, 0, 176, 4 },		\
	{ 1, IEEE80211_T_OFDM, 36000, 13, 0, 72, 4 },		\
	{ 1, IEEE80211_T_OFDM, 48000, 8, 0, 96, 4 },		\
	{ 1, IEEE80211_T_OFDM, 54000, 12, 0, 108, 4 } }		\
}

#define AR5K_RATES_11B { 4, {						\
	255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,	\
	255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,	\
	3, 2, 1, 0, 255, 255, 255, 255 }, {				\
	{ 1, IEEE80211_T_CCK, 1000, 27, 0x00, 130, 0 },		\
	{ 1, IEEE80211_T_CCK, 2000, 26, 0x04, 132, 1 },		\
	{ 1, IEEE80211_T_CCK, 5500, 25, 0x04, 139, 1 },		\
	{ 1, IEEE80211_T_CCK, 11000, 24, 0x04, 150, 1 } }	\
}

#define AR5K_RATES_11G { 12, {					\
	255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4,	\
	11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255,	\
	3, 2, 1, 0, 255, 255, 255, 255 }, {			\
	{ 1, IEEE80211_T_CCK, 1000, 27, 0x00, 2, 0 },		\
	{ 1, IEEE80211_T_CCK, 2000, 26, 0x04, 4, 1 },		\
	{ 1, IEEE80211_T_CCK, 5500, 25, 0x04, 11, 1 },		\
	{ 1, IEEE80211_T_CCK, 11000, 24, 0x04, 22, 1 },		\
	{ 0, IEEE80211_T_OFDM, 6000, 11, 0, 12, 4 },		\
	{ 0, IEEE80211_T_OFDM, 9000, 15, 0, 18, 4 },		\
	{ 1, IEEE80211_T_OFDM, 12000, 10, 0, 24, 6 },		\
	{ 1, IEEE80211_T_OFDM, 18000, 14, 0, 36, 6 },		\
	{ 1, IEEE80211_T_OFDM, 24000, 9, 0, 48, 8 },		\
	{ 1, IEEE80211_T_OFDM, 36000, 13, 0, 72, 8 },		\
	{ 1, IEEE80211_T_OFDM, 48000, 8, 0, 96, 8 },		\
	{ 1, IEEE80211_T_OFDM, 54000, 12, 0, 108, 8 } }		\
}

#define AR5K_RATES_TURBO { 8, {					\
	255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0,	\
	7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255,	\
	255, 255, 255, 255, 255, 255, 255, 255 }, {		\
	{ 1, IEEE80211_T_TURBO, 6000, 11, 0, 140, 0 },		\
	{ 1, IEEE80211_T_TURBO, 9000, 15, 0, 18, 0 },		\
	{ 1, IEEE80211_T_TURBO, 12000, 10, 0, 152, 2 },		\
	{ 1, IEEE80211_T_TURBO, 18000, 14, 0, 36, 2 },		\
	{ 1, IEEE80211_T_TURBO, 24000, 9, 0, 176, 4 },		\
	{ 1, IEEE80211_T_TURBO, 36000, 13, 0, 72, 4 },		\
	{ 1, IEEE80211_T_TURBO, 48000, 8, 0, 96, 4 },		\
	{ 1, IEEE80211_T_TURBO, 54000, 12, 0, 108, 4 } }	\
}

#define AR5K_RATES_XR { 12, {					\
	255, 3, 1, 255, 255, 255, 2, 0, 10, 8, 6, 4,		\
	11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255,	\
	255, 255, 255, 255, 255, 255, 255, 255 }, {		\
	{ 1, IEEE80211_T_XR, 500, 7, 0, 129, 0 },		\
	{ 1, IEEE80211_T_XR, 1000, 2, 0, 139, 1 },		\
	{ 1, IEEE80211_T_XR, 2000, 6, 0, 150, 2 },		\
	{ 1, IEEE80211_T_XR, 3000, 1, 0, 150, 3 },		\
	{ 1, IEEE80211_T_OFDM, 6000, 11, 0, 140, 4 },		\
	{ 1, IEEE80211_T_OFDM, 9000, 15, 0, 18, 4 },		\
	{ 1, IEEE80211_T_OFDM, 12000, 10, 0, 152, 6 },		\
	{ 1, IEEE80211_T_OFDM, 18000, 14, 0, 36, 6 },		\
	{ 1, IEEE80211_T_OFDM, 24000, 9, 0, 176, 8 },		\
	{ 1, IEEE80211_T_OFDM, 36000, 13, 0, 72, 8 },		\
	{ 1, IEEE80211_T_OFDM, 48000, 8, 0, 96, 8 },		\
	{ 1, IEEE80211_T_OFDM, 54000, 12, 0, 108, 8 } }		\
}

typedef enum {
	HAL_RFGAIN_INACTIVE = 0,
	HAL_RFGAIN_READ_REQUESTED,
	HAL_RFGAIN_NEED_CHANGE,
} HAL_RFGAIN;

typedef struct {
	u_int16_t	channel;		/* setting in Mhz */
	u_int16_t	channelFlags;

//	u_int8_t	privFlags;
//	int8_t		maxRegTxPower;		/* max regulatory tx power in dBm */
//	int8_t		maxTxPower;		/* max true tx power in 0.25 dBm */
//	int8_t		minTxPower;		/* min true tx power in 0.25 dBm */

#define c_channel	channel
#define c_channel_flags	channelFlags

} HAL_CHANNEL;

#define HAL_SLOT_TIME_9	396
#define HAL_SLOT_TIME_20	880
#define HAL_SLOT_TIME_MAX	0xffff

/* The following commented sruff are also defined (with different names) in ieee80211.h */

#define CHANNEL_A		(IEEE80211_CHAN_5GHZ | IEEE80211_CHAN_OFDM)
#define CHANNEL_B		(IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_CCK)
#define CHANNEL_G		(IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_DYN)
#define CHANNEL_PUREG		(IEEE80211_CHAN_2GHZ | IEEE80211_CHAN_OFDM)
#define CHANNEL_T		(CHANNEL_A | IEEE80211_CHAN_TURBO)
#define CHANNEL_TG		(CHANNEL_PUREG | IEEE80211_CHAN_TURBO)
#define CHANNEL_XR		(CHANNEL_A | IEEE80211_CHAN_XR)

typedef enum {
	HAL_CHIP_5GHZ = IEEE80211_CHAN_5GHZ,
	HAL_CHIP_2GHZ = IEEE80211_CHAN_2GHZ,
} HAL_CHIP;

/*
 * The following structure will be used to map 2GHz channels to
 * 5GHz Atheros channels.
 */

struct ar5k_athchan_2ghz {
	u_int32_t	a2_flags;
	u_int16_t	a2_athchan;
};

/*
 * Regulation stuff
 */

typedef enum ieee80211_countrycode HAL_CTRY_CODE;

/*
 * HAL interrupt abstraction
 */

/*
 * NOTE WELL:
 * These are mapped to take advantage of the common locations for many of
 * the bits on all of the currently supported MAC chips. This is to make
 * the ISR as efficient as possible, while still abstracting HW differences.
 * When new hardware breaks this commonality this enumerated type, as well
 * as the HAL functions using it, must be modified. All values are directly
 * mapped unless commented otherwise.
 */
typedef enum {
	HAL_INT_RX	= 0x00000001,	/* Non-common mapping */
	HAL_INT_RXDESC	= 0x00000002,
	HAL_INT_RXNOFRM	= 0x00000008,
	HAL_INT_RXEOL	= 0x00000010,
	HAL_INT_RXORN	= 0x00000020,
	HAL_INT_TX	= 0x00000040,	/* Non-common mapping */
	HAL_INT_TXDESC	= 0x00000080,
	HAL_INT_TXURN	= 0x00000800,
	HAL_INT_MIB	= 0x00001000,
	HAL_INT_RXPHY	= 0x00004000,
	HAL_INT_RXKCM	= 0x00008000,
	HAL_INT_SWBA	= 0x00010000,
	HAL_INT_BMISS	= 0x00040000,
	HAL_INT_BNR	= 0x00100000,	/* Non-common mapping */
	HAL_INT_GPIO	= 0x01000000,
	HAL_INT_FATAL	= 0x40000000,	/* Non-common mapping */
	HAL_INT_GLOBAL	= 0x80000000,	/* Set/clear IER */

	/* Interrupt bits that map directly to ISR/IMR bits */
	HAL_INT_COMMON  = HAL_INT_RXNOFRM
			| HAL_INT_RXDESC
			| HAL_INT_RXEOL
			| HAL_INT_RXORN
			| HAL_INT_TXURN
			| HAL_INT_TXDESC
			| HAL_INT_MIB
			| HAL_INT_RXPHY
			| HAL_INT_RXKCM
			| HAL_INT_SWBA
			| HAL_INT_BMISS
			| HAL_INT_GPIO,
	HAL_INT_NOCARD	= 0xffffffff	/* To signal the card was removed */
} HAL_INT;

/*
 * LED states
 */

typedef int HAL_LED_STATE;

/*The folowing are defined ieee80211_proto.h we are just
   creating aliases here*/

/* 
 * "States" for setting the LED.  These correspond to
 * the possible 802.11 operational states and there may
 * be a many-to-one mapping between these states and the
 * actual hardware states for the LED's (i.e. the hardware
 * may have fewer states).
 */
#define HAL_LED_INIT	IEEE80211_S_INIT
#define HAL_LED_SCAN	IEEE80211_S_SCAN
#define HAL_LED_AUTH	IEEE80211_S_AUTH
#define HAL_LED_ASSOC	IEEE80211_S_ASSOC
#define HAL_LED_RUN	IEEE80211_S_RUN

/* GPIO-controlled software LED */
#define AR5K_SOFTLED_PIN	0
#define AR5K_SOFTLED_ON		0
#define AR5K_SOFTLED_OFF	1

/*
 * Gain settings
 */

#define AR5K_GAIN_CRN_FIX_BITS_5111		4
#define AR5K_GAIN_CRN_FIX_BITS_5112		7
#define AR5K_GAIN_CRN_MAX_FIX_BITS		AR5K_GAIN_CRN_FIX_BITS_5112
#define AR5K_GAIN_DYN_ADJUST_HI_MARGIN		15
#define AR5K_GAIN_DYN_ADJUST_LO_MARGIN		20
#define AR5K_GAIN_CCK_PROBE_CORR		5
#define AR5K_GAIN_CCK_OFDM_GAIN_DELTA		15
#define AR5K_GAIN_STEP_COUNT			10
#define AR5K_GAIN_PARAM_TX_CLIP			0
#define AR5K_GAIN_PARAM_PD_90			1
#define AR5K_GAIN_PARAM_PD_84			2
#define AR5K_GAIN_PARAM_GAIN_SEL		3
#define AR5K_GAIN_PARAM_MIX_ORN			0
#define AR5K_GAIN_PARAM_PD_138			1
#define AR5K_GAIN_PARAM_PD_137			2
#define AR5K_GAIN_PARAM_PD_136			3
#define AR5K_GAIN_PARAM_PD_132			4
#define AR5K_GAIN_PARAM_PD_131			5
#define AR5K_GAIN_PARAM_PD_130			6
#define AR5K_GAIN_CHECK_ADJUST(_g)					\
	((_g)->g_current <= (_g)->g_low || (_g)->g_current >= (_g)->g_high)

struct ar5k_gain_opt_step {
	int16_t				gos_param[AR5K_GAIN_CRN_MAX_FIX_BITS];
	int32_t				gos_gain;
};

struct ar5k_gain_opt {
	u_int32_t			go_default;
	u_int32_t			go_steps_count;
	const struct ar5k_gain_opt_step	go_step[AR5K_GAIN_STEP_COUNT];
};

struct ar5k_gain {
	u_int32_t			g_step_idx;
	u_int32_t			g_current;
	u_int32_t			g_target;
	u_int32_t			g_low;
	u_int32_t			g_high;
	u_int32_t			g_f_corr;
	u_int32_t			g_active;
	const struct ar5k_gain_opt_step	*g_step;
};