stdpciparams.cpp

The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the d

// StdPCIParams.cpp : implementation file
//

#include "stdafx.h"
#include "AMCCPCI3Win.h"

#include "..\samplib\samplib.h"

#include "AMCCPCI3WinDlg.h"
#include "NVRAMBuild.h"
#include "StdPCIParams.h"

#ifdef _DEBUG
#define new DEBUG_NEW
#undef THIS_FILE
static char THIS_FILE[] = __FILE__;
#endif

static char sztemp[4096];
static char sztemp2[4096];

#define NUMBER_MEM_BASE_ADDR 27

static char *membase_addrs[NUMBER_MEM_BASE_ADDR+1] = {
	"16 bytes  ",
	"32 bytes  ",
	"64 bytes  ",
	"128 bytes ",
	"256 bytes ",
	"512 bytes ",
	"1 Kbytes  ",
	"2 Kbytes  ",
	"4 Kbytes  ",
	"8 Kbytes  ",
	"16 Kbytes ",
	"32 Kbytes ",
	"64 Kbytes ",
	"128 Kbytes",
	"256 Kbytes",
	"512 Kbytes",
	"1 Mbytes  ",
	"2 Mbytes  ",
	"4 Mbytes  ",
	"8 Mbytes  ",
	"16 Mbytes ",
	"32 Mbytes ",
	"64 Mbytes ",
	"128 Mbytes",
	"256 Mbytes",
	"512 Mbytes",
	"1 Gbytes  ",
	NULL
};

static DWORD membase_maxcount[NUMBER_MEM_BASE_ADDR+1] = {
	0x00000010,
	0x00000020,
	0x00000040,
	0x00000080,
	0x00000100,
	0x00000200,
	0x00000400,
	0x00000800,
	0x00001000,
	0x00002000,
	0x00004000,
	0x00008000,
	0x00010000,
	0x00020000,
	0x00040000,
	0x00080000,
	0x00100000,
	0x00200000,
	0x00400000,
	0x00800000,
	0x01000000,
	0x02000000,
	0x04000000,
	0x08000000,
	0x10000000,
	0x20000000,
	0x40000000,
	0
};

static DWORD membase_vals[] = {
	0x3FFFFFF0L,
	0x3FFFFFE0L,
	0x3FFFFFC0L,
	0x3FFFFF80L,
	0x3FFFFF00L,
	0x3FFFFE00L,
	0x3FFFFC00L,
	0x3FFFF800L,
	0x3FFFF000L,
	0x3FFFE000L,
	0x3FFFC000L,
	0x3FFF8000L,
	0x3FFF0000L,
	0x3FFE0000L,
	0x3FFC0000L,
	0x3FF80000L,
	0x3FF00000L,
	0x3FE00000L,
	0x3FC00000L,
	0x3F800000L,
	0x3F000000L,
	0x3E000000L,
	0x3C000000L,
	0x38000000L,
	0x30000000L,
	0x20000000L,
	0x00000000L
};


#define NUMBER_IO_BASE_ADDR 29

static char *iobase_addrs[NUMBER_IO_BASE_ADDR+1] = {
	"4 bytes   ",
	"8 bytes   ",
	"16 bytes  ",
	"32 bytes  ",
	"64 bytes  ",
	"128 bytes ",
	"256 bytes ",
	"512 bytes ",
	"1 Kbytes  ",
	"2 Kbytes  ",
	"4 Kbytes  ",
	"8 Kbytes  ",
	"16 Kbytes ",
	"32 Kbytes ",
	"64 Kbytes ",
	"128 Kbytes",
	"256 Kbytes",
	"512 Kbytes",
	"1 Mbytes  ",
	"2 Mbytes  ",
	"4 Mbytes  ",
	"8 Mbytes  ",
	"16 Mbytes ",
	"32 Mbytes ",
	"64 Mbytes ",
	"128 Mbytes",
	"256 Mbytes",
	"512 Mbytes",
	"1 Gbytes  ",
	NULL
};

static DWORD iobase_vals[] = {
	0x3FFFFFFCL,
	0x3FFFFFF8L,
	0x3FFFFFF0L,
	0x3FFFFFE0L,
	0x3FFFFFC0L,
	0x3FFFFF80L,
	0x3FFFFF00L,
	0x3FFFFE00L,
	0x3FFFFC00L,
	0x3FFFF800L,
	0x3FFFF000L,
	0x3FFFE000L,
	0x3FFFC000L,
	0x3FFF8000L,
	0x3FFF0000L,
	0x3FFE0000L,
	0x3FFC0000L,
	0x3FF80000L,
	0x3FF00000L,
	0x3FE00000L,
	0x3FC00000L,
	0x3F800000L,
	0x3F000000L,
	0x3E000000L,
	0x3C000000L,
	0x38000000L,
	0x30000000L,
	0x20000000L,
	0x00000000L
};

/////////////////////////////////////////////////////////////////////////////
// CStdPCIParams dialog


CStdPCIParams::CStdPCIParams(CWnd* pParent /*=NULL*/)
	: CDialog(CStdPCIParams::IDD, pParent)
{
	//{{AFX_DATA_INIT(CStdPCIParams)
		// NOTE: the ClassWizard will add member initialization here
	//}}AFX_DATA_INIT
}


void CStdPCIParams::DoDataExchange(CDataExchange* pDX)
{
	CDialog::DoDataExchange(pDX);
	//{{AFX_DATA_MAP(CStdPCIParams)
		// NOTE: the ClassWizard will add DDX and DDV calls here

	DDX_Control(pDX, IDC_RADIO_BADDR_0, m_Radio_BADDR_0 );
	DDX_Control(pDX, IDC_RADIO_BADDR_1, m_Radio_BADDR_1 );
	DDX_Control(pDX, IDC_RADIO_BADDR_2, m_Radio_BADDR_2 );
	DDX_Control(pDX, IDC_RADIO_BADDR_3, m_Radio_BADDR_3 );
	DDX_Control(pDX, IDC_RADIO_BADDR_4, m_Radio_BADDR_4 );
	DDX_Control(pDX, IDC_RADIO_BADDR_5, m_Radio_BADDR_5 );

	DDX_Control(pDX, IDC_STATIC_BADDR_ADDR, m_Static_BADDR_ADDR );

	DDX_Control(pDX, IDC_COMBO_NVRAM_TYPE, m_Combo_NVRAM_TYPE );
	DDX_Control(pDX, IDC_COMBO_NVRAM_SIZE, m_Combo_NVRAM_SIZE );
	DDX_Control(pDX, IDC_COMBO_NVRAM_WIDTH, m_Combo_NVRAM_WIDTH );
	DDX_Control(pDX, IDC_COMBO_NVRAM_LOCATION, m_Combo_NVRAM_LOCATION );
	DDX_Control(pDX, IDC_COMBO_NVRAM_PREFETCH, m_Combo_NVRAM_PREFETCH );

	DDX_Control(pDX, IDC_EDIT_BADDR_VALUE, m_Edit_BADDRT_VALUE );
	
	DDX_Control(pDX, IDC_COMBO_NVRAM_RDRETRY, m_Combo_NVRAM_RDRETRY );
	DDX_Control(pDX, IDC_COMBO_NVRAM_WRMODE, m_Combo_NVRAM_WRMODE );
	DDX_Control(pDX, IDC_COMBO_NVRAM_LAT_TIMER, m_Combo_NVRAM_LAT_TIMER );

	DDX_Control(pDX, IDC_EDIT_LOC45_VALUE, m_Edit_LOC45_VALUE );

	DDX_Control(pDX, IDC_EDIT_VID, m_Edit_VID );
	DDX_Control(pDX, IDC_EDIT_DID, m_Edit_DID );
	DDX_Control(pDX, IDC_EDIT_SVID, m_Edit_SVID );
	DDX_Control(pDX, IDC_EDIT_SDID, m_Edit_SDID );

	DDX_Control(pDX, IDC_EDIT_RID, m_Edit_RID );
	
//	DDX_Control(pDX, IDC_EDIT_PCICMD, m_Edit_PCICMD );
//	DDX_Control(pDX, IDC_EDIT_PCISTS, m_Edit_PCISTS );
	DDX_Control(pDX, IDC_EDIT_CLCD, m_Edit_CLCD );
//	DDX_Control(pDX, IDC_EDIT_CALN, m_Edit_CALN );
	DDX_Control(pDX, IDC_EDIT_LAT, m_Edit_LAT );
	DDX_Control(pDX, IDC_EDIT_HDR, m_Edit_HDR );
	DDX_Control(pDX, IDC_EDIT_BIST, m_Edit_BIST );
	DDX_Control(pDX, IDC_EDIT_XROM, m_Edit_XROM );
	DDX_Control(pDX, IDC_EDIT_INTLN, m_Edit_INTLN );
	DDX_Control(pDX, IDC_EDIT_INTPIN, m_Edit_INTPIN );
	DDX_Control(pDX, IDC_EDIT_MINGNT, m_Edit_MINGNT );
	DDX_Control(pDX, IDC_EDIT_MAXLAT, m_Edit_MAXLAT );

	DDX_Control(pDX, IDC_EDIT_CLCD_BASE_CLASS, m_Edit_CLCD_BASE_CLASS );
	DDX_Control(pDX, IDC_EDIT_CLCD_SUB_CLASS, m_Edit_CLCD_SUB_CLASS );
	DDX_Control(pDX, IDC_EDIT_CLCD_PROG_IF, m_Edit_CLCD_PROG_IF );
	
//	DDX_Control(pDX, IDC_CHECK_SERR_ENABLE, m_Check_SERR_ENABLE );
//	DDX_Control(pDX, IDC_CHECK_PERR_ENABLE, m_Check_PERR_ENABLE );
//	DDX_Control(pDX, IDC_CHECK_MEM_ACCESS_ENABLE, m_Check_MEM_ACCESS_ENABLE );
//	DDX_Control(pDX, IDC_CHECK_IO_ACCESS_ENABLE, m_Check_IO_ACCESS_ENABLE );

	DDX_Control(pDX, IDC_CHECK_ADDR_DECODE_ENABLE, m_Check_ADDR_DECODE_ENABLE );

	DDX_Control(pDX, IDC_CHECK_BUS_MASTER, m_Check_BUS_MASTER );
	
	//}}AFX_DATA_MAP
}


BEGIN_MESSAGE_MAP(CStdPCIParams, CDialog)
	//{{AFX_MSG_MAP(CStdPCIParams)
	ON_BN_CLICKED(IDC_RADIO_BADDR_0, OnRadioBaddr0)
	ON_BN_CLICKED(IDC_RADIO_BADDR_1, OnRadioBaddr1)
	ON_BN_CLICKED(IDC_RADIO_BADDR_2, OnRadioBaddr2)
	ON_BN_CLICKED(IDC_RADIO_BADDR_3, OnRadioBaddr3)
	ON_BN_CLICKED(IDC_RADIO_BADDR_4, OnRadioBaddr4)
	ON_BN_CLICKED(IDC_RADIO_BADDR_5, OnRadioBaddr5)
	ON_BN_CLICKED(IDC_BUTTON_WRITE_BADDR, OnButtonWriteBaddr)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_TYPE, OnSelchangeComboNvramType)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_WIDTH, OnSelchangeComboNvramWidth)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_LOCATION, OnSelchangeComboNvramLocation)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_PREFETCH, OnSelchangeComboNvramPrefetch)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_SIZE, OnSelchangeComboNvramSize)
	ON_BN_CLICKED(IDC_BUTTON_LOC_45, OnButtonLoc45)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_RDRETRY, OnSelchangeComboNvramRdretry)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_WRMODE, OnSelchangeComboNvramWrmode)
	ON_CBN_SELCHANGE(IDC_COMBO_NVRAM_LAT_TIMER, OnSelchangeComboNvramLatTimer)
	ON_BN_CLICKED(IDC_CHECK_ADDR_DECODE_ENABLE, OnCheckAddrDecodeEnable)
	ON_BN_CLICKED(IDC_BUTTON_UPDATE_CLCD, OnButtonUpdateClcd)
	ON_BN_CLICKED(IDC_BUTTON_WRITE_ADD_PCI_CINFIG, OnButtonWriteAddPciCinfig)
	ON_BN_CLICKED(IDC_CHECK_BUS_MASTER, OnCheckBusMaster)
	//}}AFX_MSG_MAP
END_MESSAGE_MAP()

void CStdPCIParams::Initialize( CNVRAMBuild *caller, CAMCCPCI3WinDlg *mcaller, int board, char *buffer )
{

	int i;
	UINT32 ret;

	pMain = caller;
	pmMain = mcaller;
	cur_board = board;
	pbuffer = buffer;

	strcpy( (char *)&sztemp, "AMCCPCI3Win - Standard NVRAM Parameters Function, " );
	sprintf( (char *)&sztemp2,"Board %d", cur_board );
	strcat( (char *)&sztemp, (char *)&sztemp2 );
	SetWindowText( (char *)&sztemp );

	OnRadioBaddr0();

	SetAllCurrentBADDRData();
	SetAllCurrentLOC45Data();
	SetAllCurrentGeneralData();

	m_Combo_NVRAM_TYPE.ResetContent();
	m_Combo_NVRAM_TYPE.AddString( "Memory Mapped (0)" );
	m_Combo_NVRAM_TYPE.AddString( "IO Mapped (1)" );
	m_Combo_NVRAM_TYPE.AddString( "Disabled" );
	m_Combo_NVRAM_TYPE.SetCurSel( 0 );

	m_Combo_NVRAM_PREFETCH.ResetContent();
	m_Combo_NVRAM_PREFETCH.AddString( "Not Cacheable (0)" );
	m_Combo_NVRAM_PREFETCH.AddString( "Cacheable (1)" );
	m_Combo_NVRAM_PREFETCH.SetCurSel( 0 );

	SetSizeByType();

	m_Combo_NVRAM_WIDTH.ResetContent();
	m_Combo_NVRAM_WIDTH.AddString( "Disabled (00)" );
	m_Combo_NVRAM_WIDTH.AddString( "8-Bit (01)" );
	m_Combo_NVRAM_WIDTH.AddString( "16-Bit (10)" );
	m_Combo_NVRAM_WIDTH.AddString( "32-Bit (11)" );
	m_Combo_NVRAM_WIDTH.SetCurSel( 0 );

	m_Combo_NVRAM_LOCATION.ResetContent();
	m_Combo_NVRAM_LOCATION.AddString( "Anywhere, 32-Bit Space (00)" );
	m_Combo_NVRAM_LOCATION.AddString( "Below 1MByte (01)" );
	m_Combo_NVRAM_LOCATION.AddString( "Anywhere, 64-Bit Space (10)" );
	m_Combo_NVRAM_LOCATION.AddString( "Reserved (11)" );
	m_Combo_NVRAM_LOCATION.SetCurSel( 0 );


	m_Combo_NVRAM_RDRETRY.ResetContent();
	m_Combo_NVRAM_RDRETRY.AddString( "Hold FIFO Data (0)" );
	m_Combo_NVRAM_RDRETRY.AddString( "Flush FIFO Data (1)" );
	m_Combo_NVRAM_RDRETRY.SetCurSel( 0 );

	m_Combo_NVRAM_WRMODE.ResetContent();
	m_Combo_NVRAM_WRMODE.AddString( "Disconnect, Full FIFO (0)" );
	m_Combo_NVRAM_WRMODE.AddString( "Deassert TRDY, Full FIFO (1)" );
	m_Combo_NVRAM_WRMODE.SetCurSel( 0 );

	m_Combo_NVRAM_LAT_TIMER.ResetContent();
	m_Combo_NVRAM_LAT_TIMER.AddString( "Ignore Latency Timer (0)" );
	m_Combo_NVRAM_LAT_TIMER.AddString( "PCI 2.1 Compilant (1)" );
	m_Combo_NVRAM_LAT_TIMER.SetCurSel( 0 );

	UpdateBADDRData();
	UpdateLOC45Data();
	UpdateGeneralData();

}

void CStdPCIParams::SetSizeByType( void )
{

	int i;
	UINT32 data;

	data = GetCurrentBADDRData();

	m_Combo_NVRAM_SIZE.ResetContent();
	if( data & 0x01 ) {
		last_size_index = NUMBER_IO_BASE_ADDR;
		for( i=0 ; i < NUMBER_IO_BASE_ADDR ; i++ ) {
			sprintf( sztemp,"%s", iobase_addrs[i] );
			m_Combo_NVRAM_SIZE.AddString( sztemp );
		}
	}
	else {
		last_size_index = NUMBER_MEM_BASE_ADDR;
		for( i=0 ; i < NUMBER_MEM_BASE_ADDR ; i++ ) {
			sprintf( sztemp,"%s", membase_addrs[i] );
			m_Combo_NVRAM_SIZE.AddString( sztemp );
		}
	}
	//m_Combo_NVRAM_SIZE.AddString( "Disabled" );

	m_Combo_NVRAM_SIZE.SetCurSel( 0 );

}


void CStdPCIParams::UpdateBADDRData( void )
{

	int i,j;
	UINT32 data;

	// Update address display
	i = GetCurrentBADDRIndex();
	j = 0x50 + (i * 4);
	sprintf( sztemp,"(%02x-%02x)", j+3,j );
	m_Static_BADDR_ADDR.SetWindowText( sztemp );

	data = 0;
	data = GetCurrentBADDRData();

	// Update the display data based on nvRAM
	sprintf( (char *)&sztemp,"%08x", data );
	m_Edit_BADDRT_VALUE.SetWindowText( sztemp );

	if( data != 0 ) {

		if( m_Radio_BADDR_0.GetCheck() ) {
			m_Combo_NVRAM_LOCATION.EnableWindow( FALSE );
			m_Combo_NVRAM_PREFETCH.EnableWindow( FALSE );
			m_Combo_NVRAM_WIDTH.EnableWindow( FALSE );
			m_Combo_NVRAM_SIZE.EnableWindow( FALSE );
		}
		else {
			m_Combo_NVRAM_LOCATION.EnableWindow( TRUE );
			m_Combo_NVRAM_PREFETCH.EnableWindow( TRUE );
			m_Combo_NVRAM_WIDTH.EnableWindow( TRUE );
			m_Combo_NVRAM_SIZE.EnableWindow( TRUE );
		}

		m_Combo_NVRAM_TYPE.SetCurSel( data & 0x01 );
		m_Combo_NVRAM_LOCATION.SetCurSel( (data >> 1) & 0x03 );
		m_Combo_NVRAM_PREFETCH.SetCurSel( (data >> 3) & 0x01 );
		m_Combo_NVRAM_WIDTH.SetCurSel( (data >> 30) & 0x03 );

		j = 0;
		if( data & 0x01 ) {

			if( !m_Radio_BADDR_0.GetCheck() ) {
				m_Combo_NVRAM_LOCATION.EnableWindow( FALSE );
				m_Combo_NVRAM_PREFETCH.EnableWindow( FALSE );
			}

			data = data & 0x3FFFFFFC;
			for( i=0 ; i < NUMBER_IO_BASE_ADDR ; i++ ) {
				if( iobase_vals[i] == data ) {
					j = i;
					break;
				}
				else {
					if( m_Radio_BADDR_0.GetCheck() ) {
						if( data & 0x00008000 ) {
							if( iobase_vals[i] == (data | 0x3fff0000) ) {
								j = i;
								break;
							}
						}
					}