arm_dpimacros.h

来自「this program is for arm cpu and wince」· C头文件 代码 · 共 1,469 行 · 第 1/5 页

	ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
#define ARM_ORRS_REG_IMM8(p, rd, rn, imm8) \
	ARM_ORRS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _ORR_REG_IMM8_COND(rd, rn, imm8, cond) \
	_ORR_REG_IMM_COND(rd, rn, imm8, 0, cond)
#define _ORR_REG_IMM8(rd, rn, imm8) \
	_ORR_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
#define _ORRS_REG_IMM8_COND(rd, rn, imm8, cond) \
	_ORRS_REG_IMM_COND(rd, rn, imm8, 0, cond)
#define _ORRS_REG_IMM8(rd, rn, imm8) \
	_ORRS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
#endif


/* Rd := Rn ORR Rm */
#define ARM_ORR_REG_REG_COND(p, rd, rn, rm, cond) \
	ARM_DPIOP_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
#define ARM_ORR_REG_REG(p, rd, rn, rm) \
	ARM_ORR_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
#define ARM_ORRS_REG_REG_COND(p, rd, rn, rm, cond) \
	ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
#define ARM_ORRS_REG_REG(p, rd, rn, rm) \
	ARM_ORRS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _ORR_REG_REG_COND(rd, rn, rm, cond) \
	ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
#define _ORR_REG_REG(rd, rn, rm) \
	_ORR_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
#define _ORRS_REG_REG_COND(rd, rn, rm, cond) \
	ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
#define _ORRS_REG_REG(rd, rn, rm) \
	_ORRS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
#endif


/* Rd := Rn ORR (Rm <shift_type> imm_shift) */
#define ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
#define ARM_ORR_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
	ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#define ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
#define ARM_ORRS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
	ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
#define _ORR_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
	_ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#define _ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
#define _ORRS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
	_ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#endif


/* Rd := Rn ORR (Rm <shift_type> Rs) */
#define ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
	ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
#define ARM_ORR_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
	ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
#define ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
	ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
#define ARM_ORRS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
	ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
	ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
#define _ORR_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
	_ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
#define _ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
	ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_t, rs, cond)
#define _ORRS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
	_ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
#endif


/* -- BIC -- */

/* Rd := Rn BIC (imm8 ROR rot) ; rot is power of 2 */
#define ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
	ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
#define ARM_BIC_REG_IMM(p, rd, rn, imm8, rot) \
	ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
#define ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
	ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
#define ARM_BICS_REG_IMM(p, rd, rn, imm8, rot) \
	ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _BIC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
	ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
#define _BIC_REG_IMM(rd, rn, imm8, rot) \
	_BIC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
#define _BICS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
	ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
#define _BICS_REG_IMM(rd, rn, imm8, rot) \
	_BICS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
#endif


/* Rd := Rn BIC imm8 */
#define ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
	ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
#define ARM_BIC_REG_IMM8(p, rd, rn, imm8) \
	ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
#define ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
	ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
#define ARM_BICS_REG_IMM8(p, rd, rn, imm8) \
	ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _BIC_REG_IMM8_COND(rd, rn, imm8, cond) \
	_BIC_REG_IMM_COND(rd, rn, imm8, 0, cond)
#define _BIC_REG_IMM8(rd, rn, imm8) \
	_BIC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
#define _BICS_REG_IMM8_COND(rd, rn, imm8, cond) \
	_BICS_REG_IMM_COND(rd, rn, imm8, 0, cond)
#define _BICS_REG_IMM8(rd, rn, imm8) \
	_BICS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
#endif


/* Rd := Rn BIC Rm */
#define ARM_BIC_REG_REG_COND(p, rd, rn, rm, cond) \
	ARM_DPIOP_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
#define ARM_BIC_REG_REG(p, rd, rn, rm) \
	ARM_BIC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
#define ARM_BICS_REG_REG_COND(p, rd, rn, rm, cond) \
	ARM_DPIOP_S_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
#define ARM_BICS_REG_REG(p, rd, rn, rm) \
	ARM_BICS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _BIC_REG_REG_COND(rd, rn, rm, cond) \
	ARM_IASM_DPIOP_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
#define _BIC_REG_REG(rd, rn, rm) \
	_BIC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
#define _BICS_REG_REG_COND(rd, rn, rm, cond) \
	ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
#define _BICS_REG_REG(rd, rn, rm) \
	_BICS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
#endif


/* Rd := Rn BIC (Rm <shift_type> imm_shift) */
#define ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
#define ARM_BIC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
	ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#define ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
#define ARM_BICS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
	ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
#define _BIC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
	_BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#define _BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
	ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
#define _BICS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
	_BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
#endif


/* Rd := Rn BIC (Rm <shift_type> Rs) */
#define ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
	ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
#define ARM_BIC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
	ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
#define ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
	ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
#define ARM_BICS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
	ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
	ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
#define _BIC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
	_BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
#define _BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
	ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_t, rs, cond)
#define _BICS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
	_BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
#endif






/* DPIs, comparison */

/* PSR := TST Rn, (imm8 ROR 2*rot) */
#define ARM_TST_REG_IMM_COND(p, rn, imm8, rot, cond) \
	ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TST, 0, rn, imm8, rot, cond)
#define ARM_TST_REG_IMM(p, rn, imm8, rot) \
	ARM_TST_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TST_REG_IMM_COND(rn, imm8, rot, cond) \
	ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TST, 0, rn, imm8, rot, cond)
#define _TST_REG_IMM(rn, imm8, rot) \
	_TST_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
#endif


/* PSR := TST Rn, imm8 */
#define ARM_TST_REG_IMM8_COND(p, rn, imm8, cond) \
	ARM_TST_REG_IMM_COND(p, rn, imm8, 0, cond)
#define ARM_TST_REG_IMM8(p, rn, imm8) \
	ARM_TST_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TST_REG_IMM8_COND(rn, imm8, cond) \
	_TST_REG_IMM_COND(rn, imm8, 0, cond)
#define _TST_REG_IMM8(rn, imm8) \
	_TST_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
#endif


/* PSR := TST Rn, Rm */
#define ARM_TST_REG_REG_COND(p, rn, rm, cond) \
	ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TST, 0, rn, rm, cond)
#define ARM_TST_REG_REG(p, rn, rm) \
	ARM_TST_REG_REG_COND(p, rn, rm, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TST_REG_REG_COND(rn, rm, cond) \
	ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TST, 0, rn, rm, cond)
#define _TST_REG_REG(rn, rm) \
	_TST_REG_REG_COND(rn, rm, ARMCOND_AL)
#endif


/* PSR := TST Rn, (Rm <shift_type> imm8) */
#define ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
	ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
#define ARM_TST_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
	ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
	ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
#define _TST_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
	_TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
#endif


/* PSR := TEQ Rn, (imm8 ROR 2*rot) */
#define ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, cond) \
	ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TEQ, 0, rn, imm8, rot, cond)
#define ARM_TEQ_REG_IMM(p, rn, imm8, rot) \
	ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TEQ_REG_IMM_COND(rn, imm8, rot, cond) \
	ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TEQ, 0, rn, imm8, rot, cond)
#define _TEQ_REG_IMM(rn, imm8, rot) \
	_TEQ_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
#endif


/* PSR := TEQ Rn, imm8 */
#define ARM_TEQ_REG_IMM8_COND(p, rn, imm8, cond) \
	ARM_TEQ_REG_IMM_COND(p, rn, imm8, 0, cond)
#define ARM_TEQ_REG_IMM8(p, rn, imm8) \
	ARM_TEQ_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TEQ_REG_IMM8_COND(rn, imm8, cond) \
	_TEQ_REG_IMM_COND(rn, imm8, 0, cond)
#define _TEQ_REG_IMM8(rn, imm8) \
	_TEQ_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
#endif


/* PSR := TEQ Rn, Rm */
#define ARM_TEQ_REG_REG_COND(p, rn, rm, cond) \
	ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TEQ, 0, rn, rm, cond)
#define ARM_TEQ_REG_REG(p, rn, rm) \
	ARM_TEQ_REG_REG_COND(p, rn, rm, ARMCOND_AL)

#ifndef ARM_NOIASM
#define _TEQ_REG_REG_COND(rn, rm, cond) \
	ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TEQ, 0, rn,