📄 main.lss
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9d6: 93 e0 ldi r25, 0x03 ; 3
9d8: 02 c0 rjmp .+4 ; 0x9de <main+0x2ba>
}
else uart_puts_P("Start meas. failed (short circuit?)");
9da: 83 e2 ldi r24, 0x23 ; 35
9dc: 93 e0 ldi r25, 0x03 ; 3
9de: 0e 94 8e 0b call 0x171c <uart_puts_p>
9e2: da 94 dec r13
9e4: bb cf rjmp .-138 ; 0x95c <main+0x238>
}
uart_puts_P( "\rConvert_T for all Sensors and Read Sensor by Sensor\r" );
9e6: 87 e4 ldi r24, 0x47 ; 71
9e8: 93 e0 ldi r25, 0x03 ; 3
9ea: 0e 94 8e 0b call 0x171c <uart_puts_p>
if ( DS18X20_start_meas( DS18X20_POWER_PARASITE, NULL )
9ee: 60 e0 ldi r22, 0x00 ; 0
9f0: 70 e0 ldi r23, 0x00 ; 0
9f2: 80 e0 ldi r24, 0x00 ; 0
9f4: 0e 94 6f 09 call 0x12de <DS18X20_start_meas>
9f8: 18 2f mov r17, r24
9fa: 88 23 and r24, r24
9fc: 09 f0 breq .+2 ; 0xa00 <main+0x2dc>
9fe: 41 c0 rjmp .+130 ; 0xa82 <main+0x35e>
== DS18X20_OK) {
delay_ms(DS18B20_TCONV_12BIT);
a00: 66 e4 ldi r22, 0x46 ; 70
a02: 71 e4 ldi r23, 0x41 ; 65
a04: 8f e0 ldi r24, 0x0F ; 15
a06: 90 e0 ldi r25, 0x00 ; 0
a08: 0e 94 af 06 call 0xd5e <delayloop32>
for ( i=0; i<nSensors; i++ ) {
a0c: d1 2e mov r13, r17
a0e: 1c 15 cp r17, r12
a10: e0 f5 brcc .+120 ; 0xa8a <main+0x366>
a12: 9f ea ldi r25, 0xAF ; 175
a14: e9 2e mov r14, r25
a16: 90 e0 ldi r25, 0x00 ; 0
a18: f9 2e mov r15, r25
a1a: 00 e0 ldi r16, 0x00 ; 0
a1c: 10 e0 ldi r17, 0x00 ; 0
uart_puts_P("Sensor# ");
a1e: 8d e7 ldi r24, 0x7D ; 125
a20: 93 e0 ldi r25, 0x03 ; 3
a22: 0e 94 8e 0b call 0x171c <uart_puts_p>
uart_puti((int) i+1);
a26: c8 01 movw r24, r16
a28: 01 96 adiw r24, 0x01 ; 1
a2a: 0e 94 a0 0b call 0x1740 <uart_puti>
uart_puts_P(" = ");
a2e: 86 e8 ldi r24, 0x86 ; 134
a30: 93 e0 ldi r25, 0x03 ; 3
a32: 0e 94 8e 0b call 0x171c <uart_puts_p>
if ( DS18X20_read_meas( &gSensorIDs[i][0], &subzero,
a36: 9e 01 movw r18, r28
a38: 26 5f subi r18, 0xF6 ; 246
a3a: 3f 4f sbci r19, 0xFF ; 255
a3c: ae 01 movw r20, r28
a3e: 45 5f subi r20, 0xF5 ; 245
a40: 5f 4f sbci r21, 0xFF ; 255
a42: be 01 movw r22, r28
a44: 64 5f subi r22, 0xF4 ; 244
a46: 7f 4f sbci r23, 0xFF ; 255
a48: c7 01 movw r24, r14
a4a: 0e 94 8f 09 call 0x131e <DS18X20_read_meas>
a4e: 88 23 and r24, r24
a50: 31 f4 brne .+12 ; 0xa5e <main+0x33a>
&cel, &cel_frac_bits) == DS18X20_OK ) {
uart_put_temp(subzero, cel, cel_frac_bits);
a52: 4a 85 ldd r20, Y+10 ; 0x0a
a54: 6b 85 ldd r22, Y+11 ; 0x0b
a56: 8c 85 ldd r24, Y+12 ; 0x0c
a58: 0e 94 10 03 call 0x620 <uart_put_temp>
a5c: 04 c0 rjmp .+8 ; 0xa66 <main+0x342>
}
else uart_puts_P("CRC Error (lost connection?)");
a5e: 8a e8 ldi r24, 0x8A ; 138
a60: 93 e0 ldi r25, 0x03 ; 3
a62: 0e 94 8e 0b call 0x171c <uart_puts_p>
uart_puts_P("\r");
a66: 87 ea ldi r24, 0xA7 ; 167
a68: 93 e0 ldi r25, 0x03 ; 3
a6a: 0e 94 8e 0b call 0x171c <uart_puts_p>
a6e: d3 94 inc r13
a70: 0f 5f subi r16, 0xFF ; 255
a72: 1f 4f sbci r17, 0xFF ; 255
a74: 88 e0 ldi r24, 0x08 ; 8
a76: 90 e0 ldi r25, 0x00 ; 0
a78: e8 0e add r14, r24
a7a: f9 1e adc r15, r25
a7c: dc 14 cp r13, r12
a7e: 78 f2 brcs .-98 ; 0xa1e <main+0x2fa>
a80: 04 c0 rjmp .+8 ; 0xa8a <main+0x366>
}
}
else uart_puts_P("Start meas. failed (short circuit?)");
a82: 89 ea ldi r24, 0xA9 ; 169
a84: 93 e0 ldi r25, 0x03 ; 3
a86: 0e 94 8e 0b call 0x171c <uart_puts_p>
#ifdef DS18X20_VERBOSE
// all devices:
uart_puts_P( "\rVerbose output\r" );
a8a: 8d ec ldi r24, 0xCD ; 205
a8c: 93 e0 ldi r25, 0x03 ; 3
a8e: 0e 94 8e 0b call 0x171c <uart_puts_p>
DS18X20_start_meas( DS18X20_POWER_PARASITE, NULL );
a92: 60 e0 ldi r22, 0x00 ; 0
a94: 70 e0 ldi r23, 0x00 ; 0
a96: 80 e0 ldi r24, 0x00 ; 0
a98: 0e 94 6f 09 call 0x12de <DS18X20_start_meas>
delay_ms(DS18B20_TCONV_12BIT);
a9c: 66 e4 ldi r22, 0x46 ; 70
a9e: 71 e4 ldi r23, 0x41 ; 65
aa0: 8f e0 ldi r24, 0x0F ; 15
aa2: 90 e0 ldi r25, 0x00 ; 0
aa4: 0e 94 af 06 call 0xd5e <delayloop32>
DS18X20_read_meas_all_verbose();
aa8: 0e 94 fc 07 call 0xff8 <DS18X20_read_meas_all_verbose>
#endif
delay_ms(3000);
aac: 68 e1 ldi r22, 0x18 ; 24
aae: 75 e0 ldi r23, 0x05 ; 5
ab0: 8d e3 ldi r24, 0x3D ; 61
ab2: 90 e0 ldi r25, 0x00 ; 0
ab4: 0e 94 af 06 call 0xd5e <delayloop32>
ab8: 4c cf rjmp .-360 ; 0x952 <main+0x22e>
00000aba <ow_reset>:
{
uint8_t err;
uint8_t sreg;
OW_OUT_LOW(); // disable internal pull-up (maybe on from parasite)
aba: e0 91 d7 00 lds r30, 0x00D7
abe: f0 91 d8 00 lds r31, 0x00D8
ac2: 90 91 d9 00 lds r25, 0x00D9
ac6: 90 95 com r25
ac8: 80 81 ld r24, Z
aca: 89 23 and r24, r25
acc: 80 83 st Z, r24
OW_DIR_OUT(); // pull OW-Pin low for 480us
ace: e0 91 dc 00 lds r30, 0x00DC
ad2: f0 91 dd 00 lds r31, 0x00DD
ad6: 80 81 ld r24, Z
ad8: 90 91 d9 00 lds r25, 0x00D9
adc: 89 2b or r24, r25
ade: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{
ae0: 8f eb ldi r24, 0xBF ; 191
ae2: 93 e0 ldi r25, 0x03 ; 3
asm volatile ( "cp %A0,__zero_reg__ \n\t" \
ae4: 81 15 cp r24, r1
ae6: 91 05 cpc r25, r1
ae8: 11 f0 breq .+4 ; 0xaee <L_Exit_24>
00000aea <L_LOOP_24>:
aea: 01 97 sbiw r24, 0x01 ; 1
aec: f1 f7 brne .-4 ; 0xaea <L_LOOP_24>
00000aee <L_Exit_24>:
delay_us(480);
sreg=SREG;
aee: 3f b7 in r19, 0x3f ; 63
cli();
af0: f8 94 cli
// set Pin as input - wait for clients to pull low
OW_DIR_IN(); // input
af2: e0 91 dc 00 lds r30, 0x00DC
af6: f0 91 dd 00 lds r31, 0x00DD
afa: 90 91 d9 00 lds r25, 0x00D9
afe: 90 95 com r25
b00: 80 81 ld r24, Z
b02: 89 23 and r24, r25
b04: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{
b06: 83 e8 ldi r24, 0x83 ; 131
b08: 90 e0 ldi r25, 0x00 ; 0
asm volatile ( "cp %A0,__zero_reg__ \n\t" \
b0a: 81 15 cp r24, r1
b0c: 91 05 cpc r25, r1
b0e: 11 f0 breq .+4 ; 0xb14 <L_Exit_44>
00000b10 <L_LOOP_44>:
b10: 01 97 sbiw r24, 0x01 ; 1
b12: f1 f7 brne .-4 ; 0xb10 <L_LOOP_44>
00000b14 <L_Exit_44>:
delay_us(66);
err = OW_GET_IN(); // no presence detect
b14: e0 91 da 00 lds r30, 0x00DA
b18: f0 91 db 00 lds r31, 0x00DB
b1c: 40 81 ld r20, Z
b1e: 20 91 d9 00 lds r18, 0x00D9
b22: 42 23 and r20, r18
// nobody pulled to low, still high
SREG=sreg; // sei()
b24: 3f bf out 0x3f, r19 ; 63
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{
b26: 8b e3 ldi r24, 0x3B ; 59
b28: 93 e0 ldi r25, 0x03 ; 3
asm volatile ( "cp %A0,__zero_reg__ \n\t" \
b2a: 81 15 cp r24, r1
b2c: 91 05 cpc r25, r1
b2e: 11 f0 breq .+4 ; 0xb34 <L_Exit_60>
00000b30 <L_LOOP_60>:
b30: 01 97 sbiw r24, 0x01 ; 1
b32: f1 f7 brne .-4 ; 0xb30 <L_LOOP_60>
00000b34 <L_Exit_60>:
// after a delay the clients should release the line
// and input-pin gets back to high due to pull-up-resistor
delay_us(480-66);
if( OW_GET_IN() == 0 ) // short circuit
b34: 80 81 ld r24, Z
b36: 82 23 and r24, r18
b38: 09 f4 brne .+2 ; 0xb3c <L_Exit_60+0x8>
err = 1;
b3a: 41 e0 ldi r20, 0x01 ; 1
return err;
}
b3c: 84 2f mov r24, r20
b3e: 99 27 eor r25, r25
b40: 08 95 ret
00000b42 <ow_set_bus>:
b42: 50 93 dd 00 sts 0x00DD, r21
b46: 40 93 dc 00 sts 0x00DC, r20
b4a: 70 93 d8 00 sts 0x00D8, r23
b4e: 60 93 d7 00 sts 0x00D7, r22
b52: 90 93 db 00 sts 0x00DB, r25
b56: 80 93 da 00 sts 0x00DA, r24
b5a: 81 e0 ldi r24, 0x01 ; 1
b5c: 90 e0 ldi r25, 0x00 ; 0
b5e: 02 c0 rjmp .+4 ; 0xb64 <ow_set_bus+0x22>
b60: 88 0f add r24, r24
b62: 99 1f adc r25, r25
b64: 2a 95 dec r18
b66: e2 f7 brpl .-8 ; 0xb60 <ow_set_bus+0x1e>
b68: 80 93 d9 00 sts 0x00D9, r24
b6c: 0e 94 5d 05 call 0xaba <ow_reset>
b70: 08 95 ret
00000b72 <ow_input_pin_state>:
b72: e0 91 da 00 lds r30, 0x00DA
b76: f0 91 db 00 lds r31, 0x00DB
b7a: 80 81 ld r24, Z
b7c: 90 91 d9 00 lds r25, 0x00D9
b80: 89 23 and r24, r25
b82: 99 27 eor r25, r25
b84: 08 95 ret
00000b86 <ow_parasite_enable>:
b86: e0 91 d7 00 lds r30, 0x00D7
b8a: f0 91 d8 00 lds r31, 0x00D8
b8e: 80 81 ld r24, Z
b90: 90 91 d9 00 lds r25, 0x00D9
b94: 89 2b or r24, r25
b96: 80 83 st Z, r24
b98: e0 91 dc 00 lds r30, 0x00DC
b9c: f0 91 dd 00 lds r31, 0x00DD
ba0: 80 81 ld r24, Z
ba2: 90 91 d9 00 lds r25, 0x00D9
ba6: 89 2b or r24, r25
ba8: 80 83 st Z, r24
baa: 08 95 ret
00000bac <ow_parasite_disable>:
bac: e0 91 d7 00 lds r30, 0x00D7
bb0: f0 91 d8 00 lds r31, 0x00D8
bb4: 90 91 d9 00 lds r25, 0x00D9
bb8: 90 95 com r25
bba: 80 81 ld r24, Z
bbc: 89 23 and r24, r25
bbe: 80 83 st Z, r24
bc0: e0 91 dc 00 lds r30, 0x00DC
bc4: f0 91 dd 00 lds r31, 0x00DD
bc8: 90 91 d9 00 lds r25, 0x00D9
bcc: 90 95 com r25
bce: 80 81 ld r24, Z
bd0: 89 23 and r24, r25
bd2: 80 83 st Z, r24
bd4: 08 95 ret
00000bd6 <ow_bit_io>:
/* Timing issue when using runtime-bus-selection (!OW_ONE_BUS):
The master should sample at the end of the 15-slot after initiating
the read-time-slot. The variable bus-settings need more
cycles than the constant ones so the delays had to be shortened
to achive a 15uS overall delay
Setting/clearing a bit in I/O Register needs 1 cyle in OW_ONE_BUS
but around 14 cyles in configureable bus (us-Delay is 4 cyles per uS) */
uint8_t ow_bit_io( uint8_t b )
{
bd6: 38 2f mov r19, r24
uint8_t sreg;
sreg=SREG;
bd8: 4f b7 in r20, 0x3f ; 63
cli();
bda: f8 94 cli
OW_DIR_OUT(); // drive bus low
bdc: e0 91 dc 00 lds r30, 0x00DC
be0: f0 91 dd 00 lds r31, 0x00DD
be4: 80 81 ld r24, Z
be6: 90 91 d9 00 lds r25, 0x00D9
bea: 89 2b or r24, r25
bec: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{
bee: 81 e0 ldi r24, 0x01 ; 1
bf0: 90 e0 ldi r25, 0x00 ; 0
asm volatile ( "cp %A0,__zero_reg__ \n\t" \
bf2: 81 15 cp r24, r1
bf4: 91 05 cpc r25, r1
bf6: 11 f0 breq .+4 ; 0xbfc <L_Exit_159>
00000bf8 <L_LOOP_159>:
bf8: 01 97 sbiw r24, 0x01 ; 1
bfa: f1 f7 brne .-4 ; 0xbf8 <L_LOOP_159>
00000bfc <L_Exit_159>:
delay_us(1); // Recovery-Time wuffwuff was 1
if ( b ) OW_DIR_IN(); // if bit is 1 set bus high (by ext. pull-up)
bfc: 33 23 and r19, r19
bfe: 51 f0 breq .+20 ; 0xc14 <L_Exit_159+0x18>
c00: e0 91 dc 00 lds r30, 0x00DC
c04: f0 91 dd 00 lds r31, 0x00DD
c08: 90 91 d9 00 lds r25, 0x00D9
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