power_up.vhd

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity power_up is
    Port ( clk 				: in std_logic;
	 		  reset				: in std_logic;
			  counter_enable	: in std_logic;
           data 				: out std_logic_vector(7 downto 0);
			  count	 			: out std_logic_vector(15 downto 0);
           done 				: inout std_logic
			  );
end power_up;

architecture Behavioral of power_up is
--**************************************************************************
-- STATE MACHINE SIGNAL DECLARATION:
type StateType is (
							PowerUp, 
							Hex38_1, 
							Hex38_2, 
							Hex38_3,  
							Hex38_4, 
							Hex06, 
							Hex0C, 
							Hex01, 
							Hex80,
							INIT_DONE
							);

signal CurrentState, NextState : StateType;
--**************************************************************************
constant N : natural := 30000;

signal counter : std_logic_vector(15 downto 0);

begin

COMB: process(CurrentState, counter)
begin
	case CurrentState is

		when PowerUp =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex38_1;
			else NextState <= PowerUp;
			end if;

		when Hex38_1 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex38_2;
			else NextState <= Hex38_1;
			end if;

		when Hex38_2 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex38_3;
			else NextState <= Hex38_2;
			end if;

		when Hex38_3 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex38_4;
			else NextState <= Hex38_3;
			end if;

		when Hex38_4 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex06;
			else NextState <= Hex38_4;
			end if;

		when Hex06 =>
			if(counter >= N) then	  --  if 16 mS have elapsed,
				NextState <= Hex0C;
			else NextState <= Hex06;
			end if;

		when Hex0C =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex01;
			else NextState <= Hex0C;
			end if;

		when Hex01 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= Hex80;
			else NextState <= Hex01;
			end if;

		when Hex80 =>
			if(counter >= N) then		  --  if 16 mS have elapsed,
				NextState <= INIT_DONE;
			else NextState <= Hex80;
			end if;

		when INIT_DONE =>
				NextState <= INIT_DONE;

		-- END OF INITIALIZATION 

	end case;
end process COMB;

SEQ: process(reset, clk)
begin
	if(reset = '1') then
		CurrentState <= PowerUp;
	elsif (clk'event and clk = '1') then
		CurrentState <= NextState;
	end if;
end process SEQ;


with CurrentState select
	data <= x"38" when Hex38_1,
			  x"38" when Hex38_2,
			  x"38" when Hex38_3,
			  x"38" when Hex38_4,
			  x"06" when Hex06,
			  x"0C" when Hex0C,
			  x"01" when Hex01,

			  x"80" when Hex80,  -- Cursor Position
			  x"00" when Others;  -- Dont care for INIT_DONE and POWERUP states

with CurrentState select
	done <= '1' when INIT_DONE,			 
			  '0' when Others;  

count <= counter;


--**************************************************************************
--  16 bit counter
--**************************************************************************

process(reset, clk, counter_enable)
begin
	if((reset = '1') or (counter_enable = '1')) then
		counter <= (others=>'0');
	elsif (clk'event and clk = '1') then
		if (counter = N) then	        --  Terminal Count value
			counter <= (others=>'0');
		else		
			counter <= counter + 1;
		end if;
	end if;
end process;

end Behavioral;