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📄 oemabort.lst

📁 WinCE_BSP_TK_S3C2410.zip 英陪特2410开发板BSP
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ARM macroassembler      Page:1 
    1 00000000          ; 
    2 00000000          ; Copyright (c) 2001. Samsung Electronics, co. ltd  All rights reserved. 
    3 00000000          ; 
    4 00000000          ; 
    5 00000000          ; Use of this source code is subject to the terms of the Microsoft end-user 
    6 00000000          ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. 
    7 00000000          ; If you did not accept the terms of the EULA, you are not authorized to use 
    8 00000000          ; this source code. For a copy of the EULA, please see the LICENSE.RTF on your 
    9 00000000          ; install media. 
   10 00000000          ; 
   11 00000000          ; -*-Asm-*- 
   12 00000000          ; 
   13 00000000          ; $Revision: 1.2 $ 
   14 00000000          ;   $Author: kwelton $ 
   15 00000000          ;     $Date: 1999/10/25 21:40:55 $ 
   16 00000000          ; 
   17 00000000          ; oemabort.s - header file for the data abort veneer 
   18 00000000          ; 
   19 00000000          ; This file selects options suitable for Windows CE's use of 
   20 00000000          ; the data abort veneer. 
   21 00000000          ; 
   22 00000000            
   23 00000000                  IF FORCE_TGTCPU = "ARM720" 
   48 00000000                  ENDIF 
   49 00000000            
   50 00000000                  IF FORCE_TGTCPU = "ARM920" 
   51 00000000                          GBLS    AreaName 
   52 00000000          AreaName        SETS    "|.text|" 
   53 00000000            
   54 00000000                          GBLS    VeneerEntry 
   55 00000000          VeneerEntry     SETS    "OEMDataAbortHandler" 
   56 00000000            
   57 00000000                          GBLL    BaseUpdated 
   58 00000000          BaseUpdated     SETL    {FALSE}         ; NB different to ARM720T 
   59 00000000            
   60 00000000                          GBLL    BaseRestored 
   61 00000000          BaseRestored    SETL    {TRUE}          ; NB different to ARM720T  
   62 00000000            
   63 00000000                          GBLS    HandlerCallStd 
   64 00000000          HandlerCallStd  SETS    "APCS_MACRO" 
   65 00000000            
   66 00000000                          GBLS    HandlerName 
   67 00000000          HandlerName     SETS    "HandlerMacro" 
   68 00000000            
   69 00000000                          GBLS    ReturnUndef 
   70 00000000          ReturnUndef     SETS    "0xFFFF0004" 
   71 00000000            
   72 00000000                          GBLS    ReturnToNext 
   73 00000000          ReturnToNext    SETS    "DataAbortHandler" 
   74 00000000            
   75 00000000                  ENDIF 
   76 00000000            
   77 00000000                          MACRO 
   78 00000000                          HandlerMacro 
   79 00000000                          CMP     R0,#DABORT_ERROR_NONE 
   80 00000000                          MOVEQ   R0,#DABORT_RETVAL_TONEXT 
   81 00000000                          MOVNE   R0,#DABORT_RETVAL_UNDEF 
   82 00000000                          MEND 
   83 00000000            
   84 00000000                          INCLUDE dabort.s 
    1 00000000          ; 
    2 00000000          ; Copyright (c) 2001. Samsung Electronics, co. ltd  All rights reserved. 
    3 00000000          ; 
    4 00000000          ; 
    5 00000000          ; Use of this source code is subject to the terms of the Microsoft end-user 
    6 00000000          ; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT. 
    7 00000000          ; If you did not accept the terms of the EULA, you are not authorized to use 
    8 00000000          ; this source code. For a copy of the EULA, please see the LICENSE.RTF on your 
    9 00000000          ; install media. 
   10 00000000          ; 
   11 00000000          ; -*-Asm-*- 
   12 00000000          ; 
   13 00000000          ; $Revision: 1.2 $ 
   14 00000000          ;   $Author: kwelton $ 
   15 00000000          ;     $Date: 1999/10/25 21:40:54 $ 
   16 00000000          ; 
   17 00000000          ; dabort.s - Data abort veneer 
   18 00000000          ; 
   19 00000000          ; Copyright (c) 1997 ARM Limited. 
   20 00000000          ; All rights reserved. 
   21 00000000          ; 
   22 00000000            
   23 00000000          ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 
   24 00000000          ; 
   25 00000000          ; Definitions that do not depend on assembly-time options 
   26 00000000          ; ======================================================= 
   27 00000000          ; 
   28 00000000          ; Error- and warning-related: the following are used as the first 
   29 00000000          ; parameter to the INFO directive. 
   30 00000000            
   31 00000000          WARNING         EQU     0 
   32 00000000          ERROR           EQU     4 
   33 00000000            
   34 00000000          ; Verbatim vertical bars in source text can cause problems in symbolic 
   35 00000000          ; manipulations, due to their interactions with $-introduced symbol 
   36 00000000          ; substitutions. To avoid this problem, we define a string variable 
   37 00000000          ; here containing a vertical bar, which we will use instead of a 
   38 00000000          ; literal vertical bar in most places. 
   39 00000000            
   40 00000000                          GBLS    VBar 
   41 00000000          VBar            SETS    "|" 
   42 00000000            
   43 00000000          ; The following definition is to get around some rather over- 
   44 00000000          ; enthusiastic assembler error messages. (For maximum future-proofing, 
   45 00000000          ; it should really be set to "_fsxc", but the assembler objects to 
   46 00000000          ; this at present...) 
   47 00000000            
   48 00000000                          GBLS    all_fields 
   49 00000000          all_fields      SETS    "_fc" 
   50 00000000            
   51 00000000          ; ARM register numbers declared in such a way as to make code of the 
   52 00000000          ; form R$ArithVar work. 
   53 00000000            
   54 00000000          R00000000       RN      R0 
   55 00000000          R00000001       RN      R1 
   56 00000000          R00000002       RN      R2 
   57 00000000          R00000003       RN      R3 
   58 00000000          R00000004       RN      R4 
   59 00000000          R00000005       RN      R5 
   60 00000000          R00000006       RN      R6 
   61 00000000          R00000007       RN      R7 
   62 00000000          R00000008       RN      R8 
   63 00000000          R00000009       RN      R9 
   64 00000000          R0000000A       RN      R10 
   65 00000000          R0000000B       RN      R11 
   66 00000000          R0000000C       RN      R12 
   67 00000000          R0000000D       RN      R13 
   68 00000000          R0000000E       RN      R14 
   69 00000000          R0000000F       RN      R15 
   70 00000000            
   71 00000000          ; ARM PSR bits 
   72 00000000            
   73 00000000          I_bit           EQU     0x80 
   74 00000000          T_bit           EQU     0x20 
   75 00000000            
   76 00000000          ; ARM processor mode numbers 
   77 00000000            
   78 00000000          Mode_User       EQU     0x10 
   79 00000000          Mode_Supervisor EQU     0x13 
   80 00000000          Mode_Abort      EQU     0x17 
   81 00000000          Mode_Undef      EQU     0x1B 
   82 00000000          Mode_System     EQU     0x1F 
   83 00000000            
   84 00000000          Mode_FullMask   EQU     0x1F    ; Mask to isolate full mode number 
   85 00000000          Mode_MainMask   EQU     0x0F    ; Mask to isolate non-26/32 mode no. 
   86 00000000            
   87 00000000          ; ARM PC offsets. 
   88 00000000            
   89 00000000          PCOffset_DAbort EQU     8       ; R14_abort - address(aborting instr) 
   90 00000000          PCOffset_Undef  EQU     4       ; R14_undef - address(undefined instr) 
   91 00000000            
   92 00000000          ; ARM instruction bits. The "M bit" is one that conveniently 
   93 00000000          ; distinguishes multiple transfers from single transfers for the 
   94 00000000          ; purpose of the "early aborts" model and other purposes. 
   95 00000000            
   96 00000000          ARM_M_bit       EQU     0x08000000      ;Multiple vs. single transfer 
   97 00000000          ARM_P_bit       EQU     0x01000000      ;Pre- vs. post-indexing 
   98 00000000          ARM_U_bit       EQU     0x00800000      ;Down vs. up 
   99 00000000          ARM_S_bit       EQU     0x00400000      ;S bit in LDM/STM 
  100 00000000          ARM_W_bit       EQU     0x00200000      ;Writeback vs. no writeback 
  101 00000000          ARM_L_bit       EQU     0x00100000      ;Load vs. store 
  102 00000000            
  103 00000000          ; ARM instruction fields. 
  104 00000000            
  105 00000000          ARM_Rn_pos      EQU     16 
  106 00000000          ARM_Rn_mask     EQU     0xF :SHL: ARM_Rn_pos 
  107 00000000            
  108 00000000          ARM_Rd_pos      EQU     12 
  109 00000000          ARM_Rd_mask     EQU     0xF :SHL: ARM_Rd_pos 
  110 00000000            
  111 00000000          ARM_Rm_pos      EQU     0 
  112 00000000          ARM_Rm_mask     EQU     0xF :SHL: ARM_Rm_pos 
  113 00000000            
  114 00000000          ; Thumb instruction fields 
  115 00000000            
  116 00000000          Thumb_unusual_reg_pos   EQU     8 
  117 00000000          Thumb_unusual_reg_mask  EQU     0x7 :SHL: Thumb_unusual_reg_pos 
  118 00000000            
  119 00000000          Thumb_usual_Rm_pos      EQU     6 
  120 00000000          Thumb_usual_Rm_mask     EQU     0x7 :SHL: Thumb_usual_Rm_pos 
  121 00000000            
  122 00000000          Thumb_usual_Rn_pos      EQU     3 
  123 00000000          Thumb_usual_Rn_mask     EQU     0x7 :SHL: Thumb_usual_Rn_pos 
  124 00000000            
  125 00000000          Thumb_usual_Rd_pos      EQU     0 
  126 00000000          Thumb_usual_Rd_mask     EQU     0x7 :SHL: Thumb_usual_Rd_pos 
  127 00000000            
  128 00000000          Thumb_Imm5_pos          EQU     6 
  129 00000000          Thumb_Imm5_mask         EQU     0x1F :SHL: Thumb_Imm5_pos 
  130 00000000            
  131 00000000          Thumb_Imm8_pos          EQU     0 
  132 00000000          Thumb_Imm8_mask         EQU     0xFF :SHL: Thumb_Imm8_pos 
  133 00000000            
  134 00000000          Thumb_L_bit             EQU     0x0800 
  135 00000000            
  136 00000000          ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 
  137 00000000          ; 
  138 00000000          ; Processing of assembly-time options 
  139 00000000          ; =================================== 
  140 00000000          ; 
  141 00000000          ; The following code supplies default values for assembly-time 
  142 00000000          ; options, checks for illegal or meaningless combinations, etc. 
  143 00000000          ; 
  144 00000000          ; * 'VeneerEntry' is mandatory, and will be treated as a label. We 
  145 00000000          ;    reprocess it at this stage to ensure that it is surrounded by 
  146 00000000          ;    vertical bars. (These clean-ups and similar ones later are *not* 
  147 00000000          ;    intended to catch all possible syntactic errors - just to allow 
  148 00000000          ;    the symbol to be specified with or without the vertical bars and 
  149 00000000          ;    to catch the most obvious syntactic errors.) 
  150 00000000            
  151 00000000                  [ :LNOT::DEF:VeneerEntry 
  154 00000000                  ] 
  155 00000000            
  156 00000000                  [ VeneerEntry = "" 
  159 00000000                  ] 
  160 00000000            
  161 00000000                  [ ((VeneerEntry:LEFT:1) = VBar)           :LEOR: ((VeneerEntry:RIGHT:1) = VBar) 
  165 00000000                  ] 
  166 00000000                  [ (VeneerEntry:LEFT:1) <> VBar 
  167 00000000          VeneerEntry     SETS    VBar:CC:VeneerEntry:CC:VBar 
  168 00000000                  ] 
  169 00000000            
  170 00000000          ; * 'AreaName' is optional, defaulting to "DataAbortVeneerCode". (Done 
  171 00000000          ;    via an empty string to also catch cases where it has been defined 
  172 00000000          ;    as the empty string.) It gets the usual vertical bar 
  173 00000000          ;    reprocessing. 
  174 00000000            

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