magic-boot-2440-v1.0.patch

三星2440,超強bootloader,使用vivi下去做修改的.....歡迎使用

 
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 	gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14;
 #endif
 #ifdef CONFIG_S3C2400
@@ -139,7 +140,7 @@
 	}
 
 	if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 		ulong old_gpecon = gpio->GPECON;
 #endif
 #ifdef CONFIG_S3C2400
@@ -147,7 +148,7 @@
 #endif
 		/* bus still busy probably by (most) previously interrupted transfer */
 
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 		/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
 		gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
 #endif
@@ -171,7 +172,7 @@
 		udelay (1000);
 
 		/* restore pin functions */
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 		gpio->GPECON = old_gpecon;
 #endif
 #ifdef CONFIG_S3C2400
diff -Nur u-boot-1.2.0/cpu/arm920t/s3c24x0/interrupts.c magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/interrupts.c
--- u-boot-1.2.0/cpu/arm920t/s3c24x0/interrupts.c	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/interrupts.c	2007-06-29 15:17:24.000000000 +0800
@@ -30,13 +30,16 @@
  */
 
 #include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
+    defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
 
 #include <arm920t.h>
 #if defined(CONFIG_S3C2400)
 #include <s3c2400.h>
 #elif defined(CONFIG_S3C2410)
 #include <s3c2410.h>
+#elif defined(CONFIG_S3C2440)
+#include <s3c2440.h>
 #endif
 
 int timer_load_val = 0;
@@ -178,6 +181,7 @@
 	tbclk = timer_load_val * 100;
 #elif defined(CONFIG_SBC2410X) || \
       defined(CONFIG_SMDK2410) || \
+      defined(CONFIG_MAX2440P) || \
       defined(CONFIG_VCMA9)
 	tbclk = CFG_HZ;
 #else
@@ -216,4 +220,4 @@
 	/*NOTREACHED*/
 }
 
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) || defined (CONFIG_TRAB) */
diff -Nur u-boot-1.2.0/cpu/arm920t/s3c24x0/serial.c magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/serial.c
--- u-boot-1.2.0/cpu/arm920t/s3c24x0/serial.c	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/serial.c	2007-06-29 15:19:31.000000000 +0800
@@ -19,12 +19,15 @@
  */
 
 #include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || \
+    defined (CONFIG_S3C2440) || defined (CONFIG_TRAB)
 
 #if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB)
 #include <s3c2400.h>
 #elif defined(CONFIG_S3C2410)
 #include <s3c2410.h>
+#elif defined(CONFIG_S3C2440)
+#include <s3c2440.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -180,4 +183,4 @@
 	}
 }
 
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) || defined (CONFIG_TRAB) */
diff -Nur u-boot-1.2.0/cpu/arm920t/s3c24x0/speed.c magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/speed.c
--- u-boot-1.2.0/cpu/arm920t/s3c24x0/speed.c	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/speed.c	2007-06-29 15:13:28.000000000 +0800
@@ -30,12 +30,15 @@
  */
 
 #include <common.h>
-#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) ||\
+    defined(CONFIG_S3C2440) || defined (CONFIG_TRAB)
 
 #if defined(CONFIG_S3C2400)
 #include <s3c2400.h>
 #elif defined(CONFIG_S3C2410)
 #include <s3c2410.h>
+#elif defined(CONFIG_S3C2440)
+#include <s3c2440.h>
 #endif
 
 #define MPLL 0
@@ -98,4 +101,4 @@
     return(get_PLLCLK(UPLL));
 }
 
-#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */
+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_S3C2440) || defined (CONFIG_TRAB) */
diff -Nur u-boot-1.2.0/cpu/arm920t/s3c24x0/usb_ohci.c magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/usb_ohci.c
--- u-boot-1.2.0/cpu/arm920t/s3c24x0/usb_ohci.c	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/usb_ohci.c	2007-06-29 15:10:29.000000000 +0800
@@ -44,6 +44,8 @@
 #include <s3c2400.h>
 #elif defined(CONFIG_S3C2410)
 #include <s3c2410.h>
+#elif defined(CONFIG_S3C2440)
+#include <s3c2440.h>
 #endif
 
 #include <malloc.h>
diff -Nur u-boot-1.2.0/cpu/arm920t/start.S magic-boot-2440-v1.0/cpu/arm920t/start.S
--- u-boot-1.2.0/cpu/arm920t/start.S	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/cpu/arm920t/start.S	2007-06-29 16:18:15.000000000 +0800
@@ -121,14 +121,27 @@
 # define pWTCON		0x15300000
 # define INTMSK		0x14400008	/* Interupt-Controller base addresses */
 # define CLKDIVN	0x14800014	/* clock divisor register */
-#elif defined(CONFIG_S3C2410)
+#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 # define pWTCON		0x53000000
 # define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
 # define INTSUBMSK	0x4A00001C
 # define CLKDIVN	0x4C000014	/* clock divisor register */
 #endif
 
-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
+#if defined(CONFIG_S3C2410)
+# define INTSUBMSK_val	0x7ff
+# define MPLLCON_val	((0x90 << 12) + (0x7 << 4) + 0x0)	/* 202 MHz */
+# define UPLLCON_val	((0x78 << 12) + (0x2 << 4) + 0x3)
+# define CLKDIVN_val	3 /* FCLK:HCLK:PCLK = 1:2:4 */
+#elif defined(CONFIG_S3C2440)
+# define INTSUBMSK_val	0xffff
+# define MPLLCON_val	((0x61 << 12) + (0x1 << 4) + 0x2)	/* 296.35 MHz */
+# define UPLLCON_val	((0x3c << 12) + (0x4 << 4) + 0x2)
+# define CLKDIVN_val	5 /* FCLK:HCLK:PCLK = 1:3:6 */
+# define CAMDIVN	0x4C000018
+#endif
+
+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 	ldr     r0, =pWTCON
 	mov     r1, #0x0
 	str     r1, [r0]
@@ -139,18 +152,55 @@
 	mov	r1, #0xffffffff
 	ldr	r0, =INTMSK
 	str	r1, [r0]
-# if defined(CONFIG_S3C2410)
-	ldr	r1, =0x3ff
+# if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
+	ldr	r1, =INTSUBMSK_val
 	ldr	r0, =INTSUBMSK
 	str	r1, [r0]
 # endif
-
-	/* FCLK:HCLK:PCLK = 1:2:4 */
-	/* default FCLK is 120 MHz ! */
-	ldr	r0, =CLKDIVN
-	mov	r1, #3
+#if defined(CONFIG_S3C2440)
+	/* Make sure we get FCLK:HCLK:PCLK = 1:3:6 */
+	ldr	r0, =CAMDIVN
+	mov	r1, #0
 	str	r1, [r0]
-#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 */
+#endif
+
+	/* Clock asynchronous mode */
+	mrc	p15, 0, r1, c1, c0, 0
+	orr	r1, r1, #0xc0000000
+	mcr	p15, 0, r1, c1, c0, 0
+
+#define LOCKTIME	0x4c000000
+#define UPLLCON		0x4c000008
+
+
+   	ldr	r0, =LOCKTIME
+ 	mov	r1, #0xffffff
+ 	str	r1, [r0]
+ 
+  	ldr	r0, =UPLLCON
+	ldr	r1, =UPLLCON_val
+ 	str	r1, [r0]
+	
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+ 	/* FCLK:HCLK:PCLK = 1:2:4 */
+ 	ldr	r0, =CLKDIVN
+	mov	r1, #CLKDIVN_val
+ 	str	r1, [r0]
+				 
+
+#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440*/
 
 	/*
 	 * we do sys-critical inits only at reboot,
diff -Nur u-boot-1.2.0/include/common.h magic-boot-2440-v1.0/include/common.h
--- u-boot-1.2.0/include/common.h	2007-01-07 07:13:11.000000000 +0800
+++ magic-boot-2440-v1.0/include/common.h	2007-06-29 15:09:35.000000000 +0800
@@ -451,7 +451,7 @@
 ulong	get_OPB_freq (void);
 ulong	get_PCI_freq (void);
 #endif
-#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X)
+#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)|| defined(CONFIG_S3C2440) || defined(CONFIG_LH7A40X)
 ulong	get_FCLK (void);
 ulong	get_HCLK (void);
 ulong	get_PCLK (void);
diff -Nur u-boot-1.2.0/include/configs/max2440p.h magic-boot-2440-v1.0/include/configs/max2440p.h
--- u-boot-1.2.0/include/configs/max2440p.h	1970-01-01 08:00:00.000000000 +0800
+++ magic-boot-2440-v1.0/include/configs/max2440p.h	2007-06-29 17:51:36.000000000 +0800
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[e-mail]>
+ * Gary Jennejohn <[e-mail]>
+ * David Mueller <[e-mail]>
+ *
+ * Configuation settings for the SAMSUNG SMDK2410 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
+#define	CONFIG_S3C2440		1	/* in a SAMSUNG S3C2410 SoC     */
+#define CONFIG_MAX2440P		1	/* on a SAMSUNG SMDK2410 Board  */
+
+/* input clock of PLL */
+#define CONFIG_SYS_CLK_FREQ	12000000/* the SMDK2410 has 12MHz input clock */
+
+
+#define USE_920T_MMU		1
+#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000	1	/* we have a CS8900 on-board */
+#define CONFIG_DM9000_BASE	0x18000000
+#define CONFIG_DM9000_USE_16BIT
+#define DM9000_DATA		CONFIG_DM9000_BASE
+#define DM9000_IO		(CONFIG_DM9000_BASE + 4)
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on SMDK2410 */
+
+/************************************************************
+ * RTC
+ ************************************************************/
+#define	CONFIG_RTC_S3C24X0	1
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE		115200
+
+/***********************************************************
+ * Command definition
+ ***********************************************************/
+#define CONFIG_COMMANDS \
+			(CONFIG_CMD_DFL	 | \
+			CFG_CMD_CACHE	 | \
+			/*CFG_CMD_NAND	 |*/ \
+			/*CFG_CMD_EEPROM |*/ \
+			/*CFG_CMD_I2C	 |*/ \
+			/*CFG_CMD_USB	 |*/ \
+			CFG_CMD_REGINFO  | \
+			CFG_CMD_NET  | \
+			CFG_CMD_ENV  | \
+			CFG_CMD_FLASH  | \
+			CFG_CMD_DATE	 | \
+			CFG_CMD_ELF)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+#define CONFIG_BOOTDELAY	5
+#define CONFIG_BOOTARGS    	"root=ramfs devfs=mount console=ttySA0,9600"
+#define CONFIG_ETHADDR		20:07:12:01:50:01 
+#define CONFIG_NETMASK          255.255.255.0
+#define CONFIG_IPADDR	        192.168.0.125	
+#define CONFIG_SERVERIP		192.168.0.1
+#define CONFIG_BOOTFILE		"elinos-lart" 
+#define CONFIG_BOOTCOMMAND	"tftp; bootm" 
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
+/* what's this ? it's not used anywhere */
+#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CFG_LONGHELP				/* undef to save memory		*/
+#define	CFG_PROMPT		"MAX2440P # "	/* Monitor Command Prompt	*/
+#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define	CFG_MAXARGS		16		/* max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+#define CFG_MEMTEST_START	0x30000000	/* memtest works on	*/
+#define CFG_MEMTEST_END		0x33F00000	/* 63 MB in DRAM	*/
+
+#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
+
+#define	CFG_LOAD_ADDR		0x32000000	/* default load address	*/
+
+/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
+/* it to wrap 100 times (total 1562500) to get 1 sec. */
+#define	CFG_HZ			1562500
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1		0x30000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */
+
+#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */
+
+#define CFG_FLASH_BASE		PHYS_FLASH_1
+
+#define S3C2440_NAND_BASE	0x80000000
+#define S3C2440_ADC_BASE	0x90000000
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+#define CONFIG_SST_xF1601	1	/* uncomment this if you have a LV400 flash */
+#if 0
+#define CONFIG_AMD_LV800	1	/* uncomment this if you have a LV800 flash */
+#endif
+
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
+#ifdef CONFIG_SST_xF1601
+#define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
+#define CFG_MAX_FLASH_SECT	(35)	/* max number of sectors on one chip */
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x060000) /* addr of environment */
+#endif
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE		0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT	(11)	/* max number of sectors on one chip */
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x060000) /* addr of environment */
+#endif
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */
+
+#define	CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
+
+#endif	/* __CONFIG_H */
diff -Nur u-boot-1.2.0/include/s3c2440.h magic-boot-2440-v1.0/include/s3c2440.h
--- u-boot-1.2.0/include/s3c2440.h	1970-01-01 08:00:00.000000000 +0800
+++ magic-boot-2440-v1.0/include/s3c2440.h	2007-06-29 16:02:52.000000000 +0800
@@ -0,0 +1,235 @@
+/*
+ * (C) Copyright 2003
+ * David M黮ler ELSOFT AG Switzerland. [e-mail]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA