sx2hostcpu.h

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/* sx2HostCpu.h - header file for USB driver host CPU and BSP specific module */

/*
modification history
--------------------
01a,05nov01,hab  Created
*/

#ifndef __INCsx2HostCpuh
#define __INCsx2HostCpuh

#ifdef __cplusplus
extern "C" {
#endif

    
/* Set SX2_BUS_WIDTH to match how the chip is wired.
   if only 8 data bits (FD0-7) are wired, set SX2_BUS_WIDTH to SX2_BUS_8BIT
   if all 16 data bits (FD0-15) are wired, set SX2_BUS_WIDTH to SX2_BUS_16BIT */

#define SX2_BUS_8BIT    0x01
#define SX2_BUS_16BIT   0x02
#define SX2_BUS_WIDTH   SX2_BUS_16BIT

/* If all 16 data bits are wired, the FIFOs can be accessed in either 8 bit or 
   16 bit mode, determined by the WORDWIDE bit in the EPxPKTLENH registers. 
   The following macro applies to all FIFOs and determines if FIFO access
   is 8 bit or 16 bit wide. 
   Note: In order to use SX2_FIFO_16BIT, the entire 16 bit SX2 data bus must 
   be wired, and SX2_BUS_WIDTH must be set to SX2_BUS_16BIT. */

#define SX2_FIFO_8BIT    0x01
#define SX2_FIFO_16BIT   0x02
#define SX2_FIFO_WIDTH   SX2_FIFO_8BIT
   
/* take care of endianness */

#if (SX2_BUS_WIDTH == SX2_BUS_16BIT)
#if (_BYTE_ORDER == _BIG_ENDIAN)
#define SX2_WORD_SWAP(x)        (x)
#else  /* _BYTE_ORDER == _BIG_ENDIAN */
#define SX2_WORD_SWAP(x)        (MSB(x) | LSB(x) << 8)
#endif
#else /* SX2_BUS_WIDTH == SX2_BUS_16BIT */
#define SX2_WORD_SWAP(x)        (x)
#endif
                
/* register macros */

#if (SX2_BUS_WIDTH == SX2_BUS_8BIT)
#define SX2REG(reg)  (volatile UINT8 *)(hostCpu.sx2BaseAddr + reg*(hostCpu.sx2RegDelta))
#else
#define SX2REG(reg)  (volatile UINT16 *)(hostCpu.sx2BaseAddr + reg*(hostCpu.sx2RegDelta))
#endif

/* service task parameters */

#define SVC_TASK_NAME   "tSx2Task"
#define SVC_TASK_PRIO   60
#define SVC_TASK_OPT    0x00
#define SVC_TASK_STACK  4096

/* service message queue parameters */

#define SVC_Q_MAX_MSGS  200
#define SVC_Q_MSG_SIZE  2

/* Host CPU and BSP specific data and function pointers are kept in the 
   HOST_CPU data structure */

typedef struct 
{
    /* mandatory function pointers and data */

#if (SX2_BUS_WIDTH == SX2_BUS_8BIT)
    VOID        (*_func_hostCpuWrite)();
    UINT8       (*_func_hostCpuRead)();
    volatile UINT8      * sx2Fifo2;
    volatile UINT8      * sx2Fifo4;
    volatile UINT8      * sx2Fifo6;
    volatile UINT8      * sx2Fifo8;
    volatile UINT8      * sx2Cmd;
#else
    VOID        (*_func_hostCpuWrite)();
    UINT16      (*_func_hostCpuRead)();
    volatile UINT16     * sx2Fifo2;
    volatile UINT16     * sx2Fifo4;
    volatile UINT16     * sx2Fifo6;
    volatile UINT16     * sx2Fifo8;
    volatile UINT16     * sx2Cmd;
#endif
    STATUS      (*_func_waitReady)(VOID);   /* host specific READY pin wait routine */

    /* optional function pointers */

    STATUS      (*_func_hostSx2Wakeup)(VOID); /* host specific SX2 wakeup function */
    STATUS      (*_func_hostSx2Reset)(VOID);  /* host specific SX2 reset function */
    UINT8       (*_func_hostFlagRead)(UINT8);  /* host specific flag read function */
    VOID        (*_func_hostPktendSet)(UINT8); /* host specific PKTEND function */
    STATUS      (*_func_isrHook)(UINT16);     /* hook routine for SX2 ISR */
    STATUS      (*_func_drvCleanup)(VOID);  /* driver cleanup routine */
    STATUS      (*_func_readRegNotifyHook)(UINT32); /* read reg completion hook */
    STATUS      (*_func_writeRegNotifyHook)(UINT32); /* write reg completion hook */
    STATUS      (*_func_readFifoNotifyHook)(UINT32); /* read FIFO completion hook */
    STATUS      (*_func_writeFifoNotifyHook)(UINT32); /* write FIFO completion hook */

    /* state information */
    
    UINT32      sx2BaseAddr;            /* SX2 base addr in CPUs address space */
    UINT32      sx2RegDelta;            /* register spacing */
    UINT32      sx2IntVec;              /* interrupt vector */
    UINT32      maxSpinCount;           /* max iterations for polling READY line */
    UINT32      readSyncFlag;           /* task to interrupt read sync flag */     
    SEM_ID      readSyncSem;            /* interrupt to task read sync sem */
    UINT32      svcTaskId;              /* service task id */
    MSG_Q_ID    svcQId;                 /* service queue id */
    BOOL        sx2Initialized;         /* flag indicating chip init status  */
    BOOL        sx2BusActive;           /* flag to keep track of BUSACTIVITY interrupts */

} HOST_CPU;



#ifdef __cplusplus
}
#endif

#endif /* __INCsx2HostCpuh */