lpc_isp_4k_v03.a51

LPC9XX单片机ISP引导程序,实现在线烧写程序及网络更新

;LPC9xx family boot program for IN-SYSTEM PROGRAMMING
;
;copyright Philips Semiconductors 2003

;FILENAME: 		LPC2_ISP_4K_V03.TXT
;CODE TYPE: 		ISP
;VERSION: 		03
;RELEASE DATE: 		17 DEC 03
;CODE MEMORY SIZE: 	4KB
;CODE ADDRESS RANGE: 	0E00h - 0FFFh
;BOOT VECTOR: 		0F00h
;USES IAP VERSION: 	03
;USES IAP ENTRY: 	FF03h
;Author:		Bill Houghton
;
;Features:
;
;Version 3:
;
;- Support added for hardware code corruption (BOOTSTAT.7:5) - valid key needed for write operations
;- Fixes bug in direct load of UART baud rate command.
;- Fixes Port 0 init to only program P1 modes for TxD & RxD pins. 
;
;Version 2:
;- Modifieds WDL and WDCON to select longest WDT timeout & provides periodic feeding.
;- Program user code page has option to use either IDATA or XDATA (if available on chip).
;- Software code corruption protection - valid key needed for write operations 
;- Code traps (software reset) added to start of ISP & IAP sections
;
;Version 1:
;- Includes standard features originally released with LPC932.




;********************************************************************************
;************************* SET DEVICE CODE MEMORY SIZE HERE *********************
;********************************************************************************

;This program is used to create source code for devices with different code memory
;sizes. To set the size of the device, "comment-out" the two devices sizes that do
;not match leaving only the appropriate device size.

;MEM_TOP	EQU	2000H	;use for 8KB code memory devices
MEM_TOP		EQU	1000H	;use for 4KB code memory devices
;MEM_TOP	EQU	800H	;use for 2KB code memory devices

;code memory space for LPC2
;
;block 0, 1KB, 0000h - 03FFh
;block 1, 1KB, 0400h - 07FFh
;block 2, 1KB, 0800h - 0BFFh
;block 3, 1KB, 0C00h - 0FFFh
;block 4, 1KB, 1000h - 13FFh
;block 5, 1KB, 1400h - 17FFh
;block 6, 1KB, 1800h - 1BFFh
;block 7, 1KB, 1C00h - 1FFFh

;Bootrom, 240 bytes , FF00h - FFEF


PGMU	EQU	00
VRD	EQU	01               
MWR	EQU	02               
MRD	EQU	03               
ERS	EQU	04               
SCRC	EQU	05               
GCRC	EQU	06               
RUSR	EQU	07
F1	EQU	0D1H
WDL	EQU	0C1H
WDCON	EQU	0A7H
WFEED1	EQU	0C2H
WFEED2	EQU	0C3H
FMCON	EQU	0E4H
FMDATA	EQU	0E5H
               
PGM_MTP	EQU	0FF03H		


;byte variables definition

DSEG	AT	30H

ADR0:		DS	1		;low byte of address
ADR1:		DS	1		;high byte of address
CHKSUM:	DS	1		;record checksum
NBYTES:	DS	1		;number of bytes in record
RTYPE:	DS	1		;record type
TMP3:		DS	1		;temporary storage

UCFG1:	DS	1	;User configuration register 1
UCFG2:	DS	1	;User configuration register 2
BOOTV:	DS	1	;Boot Vector
STATBY:	DS	1	;Status Byte
FCFG1:	DS	1	;Factory config 1, read only
FCFG2:	DS	1	;Factory config 2, read only 
DERIV:	DS	1	;Derivative
TMEB_v:	DS	1	;TMEB
SEC0:		DS	1	;Security byte 0
SEC1:		DS	1	;Security byte 1
SEC2:		DS	1	;Security byte 2
SEC3:		DS	1	;Security byte 3
SEC4:		DS	1	;Security byte 4
SEC5:		DS	1	;Security byte 5
SEC6:		DS	1	;Security byte 6
SEC7:		DS	1	;Security byte 7
MF_ID:		DS	1	;Signature byte 0 (mfg id)
ID_1:		DS	1	;Signature byte 1 (device id)
ID_2:		DS	1	;Signature byte 2 (derivative id)

CRC0:		DS	1	;CRC data
CRC1:		DS	1	;CRC data
CRC2:		DS	1	;CRC data
CRC3:		DS	1	;CRC data

;ISEG	AT	0FFH

;KEY:		DS	1	;IAP request key
KEY data 0xFF

;*************** equates list       ************************

CONFB		EQU	UCFG1		;start of CONF register space
RXDn		EQU	P1.1		;RxD pin
ISP_VER		EQU	03H		;ISP version id = 3
AUXR		EQU	08EH		;auxr register
AUXR1		EQU	0A2H		;auxr 1 register
SRST		EQU	8H		;OR mask for software reset bit
TAMOD		EQU	8FH		;timer aux mode register
P1M1		EQU	91H
P1M2		EQU	92H

OI		EQU	ACC.0		;operation aborted by interrupt 
SV		EQU	ACC.1		;security violation
HVE		EQU	ACC.2		;high voltage error 

SBVAL		EQU	0FFH		;status byte default value
BVVAL		EQU	0FCH		;boot vector default value
DBYTES		EQU	80H		;start of RAM buffer for hex string
KEYVAL		EQU	96H		;IAP request key value
SET_WE		EQU	08H		;enable writing

CSEG	AT	MEM_TOP-512		;Should be 1E00h

RESET:
	ORL	AUXR1,#SRST	;set the software reset bit
;*********************************************************
;
;	START OF PROGRAM
;
;*********************************************************

;	First, we need to measure the baud rate of
;the host in terms of our own clock speed. This
;measurement can be made on a start bit provided
;the first data bit is a logical one. A capital "U"
;is a good choice since it has alternating 1s and 0s . 
;	Our measurement uses T1 which is clocked at
;fosc/2, which is the same as when T1 is used as 
;a baud rate generator. The UART uses 16x sampling
;so we need to divide the T1 count by 16. Even
;though the timer will be used in the 8-bit
;auto-reload mode for baud rate generation, non-reload
;16-bit mode is used for the measurement to give
;more clock counts for slower baud rates. This number
;will be divided by 16. This method allows the timer
;to count up to 4096 counts (16 x 256). The timer
;counts up towards zero thus counts loaded into the
;timer counter need to be negative numbers. A two's
;complement of the adjusted count produces this result.


INIT:

	ACALL	I_WDT		;
	ANL	P1M1,#0FCH	;RxD = quasi-bi
	ORL	P1M2,#01H	;TxD = push-pull
	MOV	P1,#0FFH	;
	MOV	TMOD,#10H	;16-bit non-reload 
	ANL	TAMOD,#0EFH	;not pwm mode 
	MOV	PCON,#80H	;SMOD = 1 = baud rate = T1/16
	CLR	A		;
	MOV	TH1,A		;set T1 to zero since we will
	MOV	TL1,A		;use this to count the start bit
MEAS:	
M1:	ACALL	FD_WDT		;feed the WDT
	JNB	RXDn,M1		;wait for RXD to be high
M2:	ACALL	FD_WDT		;feed the WDT
	JB	RXDn,M2		;wait until RXD goes low
	SETB	TR1		;start measuring the bit time
M3:	JNB	RXDn,M3		;wait until RXD goes high
	CLR	TR1		;stop measuring
	ACALL	FD_WDT		;feed the WDT
	MOV	RTYPE,TH1	;copy timer to RAM
	MOV	R1,#RTYPE	;for indirect addressing
	MOV	A,TL1		;get timer low byte
	XCHD	A,@R1		;acc= TL upper nibble & TH lower nibble
	SWAP	A		;acc= TH lower nibble & TL upper nibble
	CPL	A		;complement lower byte of count
	INC	A		;two's complement  = - count/16
	MOV	TL1,A		;
	MOV	TH1,A		;load counts & switch to
	MOV	TMOD,#20H	;8-bit auto-reload mode
	SETB	TR1		;start T1
	MOV	SCON,#52H	;init UART 8-bit variable, TI=1 RI=0
QRZ:	ACALL	ECHO		;wait until character is rcv'd & get it
	CJNE	A,#'U',QRZ	;check to see if uppercase "U"

;***** Intel Hex File Load routine *****
;
;This routine loads an Intel Hex formatted file into 
;the buffer memory. The hex file is received as a series
;of ASCII characters on the serial input line of the
;serial port. A record type of 00H is considered to be
;a data field. Any other type of record is considered
;to be an End-of-File marker. This routine also calculates
;the checksum on the field as it is received and compares
;this calculated checksum with the checksum field received
;in the record.

LCMD:
	MOV	R5,#0	;begin record... zero checksum
	ACALL	ECHO		;get first char and echo
	CJNE	A,#':',LCMD	;record starts with ':' char
	ACALL	GET2		;get the number of bytes in record
	MOV	NBYTES,TMP3	;and save
	ACALL	GET2		;get MSB of load address
	MOV	ADR1,TMP3	;and save
	ACALL	GET2		;get LSB of load address
	MOV	ADR0,TMP3	;and save it
	ACALL	GET2		;get record type
	MOV	RTYPE,TMP3	;and save it
	MOV	A,NBYTES	;else, more than
	MOV	R2,A	
	JZ	EOR		;zero data bytes ?
	MOV	R1,#DBYTES	;pointer for data bytes
LDATA:	ACALL	GET2		;get data byte
	MOV	@R1,TMP3	;store it
	INC	R1		;and bump up the pointer	
	DJNZ	R2,LDATA	;repeat if more bytes in record
EOR:
	MOV	A,R5		;
	MOV	R4,A		;save calculated checksum
	ACALL	GET2		;get the checksum byte
	MOV	A,R4		;and compare with calculated checksum byte
	CJNE	A,TMP3,CHKERR	;recv'd & calc'd chksums match ?
	AJMP	PROCESS		;YES, process command

CHKERR:	MOV	A,#'X'
	AJMP	RSPND1

GET2:	ACALL	ECHO		;get first char of length
	ACALL	A2HEX		;convert to hex
	SWAP	A		;set in high nibble
	MOV	TMP3,A		;store in NBYTES
	ACALL	ECHO		;get second char of length
	ACALL	A2HEX		;convert to hex
	ORL	TMP3,A		;add into NBYTES
	MOV	A,R5		;get checksum
	CLR	C		;subtract NBYTES
	SUBB	A,TMP3		;from checksum and
	MOV	R5,A		;store as new checksum
	RET

;***** console output routine *****
;
;Outputs character in the ACC to 
;the serial output line.

CO:	ACALL	FD_WDT		;feed the WDT
	JNB	TI,CO		;wait till xmtr ready
	CLR	TI		;reset xmtr flag
	MOV	SBUF,A	;output char to SIO
	RET			;and done

;***** console input routine *****
;
;Waits until character has been received
;and then returns char in ACC.

CI:	ACALL	FD_WDT		;feed the WDT
	JNB	RI,CI		;wait till char
	CLR	RI		;reset rcvr flag