sinsignal.hier_info

来自「fpga的应用」· HIER_INFO 代码 · 共 1,674 行 · 第 1/5 页

|sinsignal
ready <= mysin:inst10.data_ready
clkin => altpll1:inst.inclk0
key1 => key_delay:inst18.key
sw_1 => addcon:inst1.control
sw_4 => FM:inst5.enable
cosout[0] <= mysin:inst10.fcos_o[0]
cosout[1] <= mysin:inst10.fcos_o[1]
cosout[2] <= mysin:inst10.fcos_o[2]
cosout[3] <= mysin:inst10.fcos_o[3]
cosout[4] <= mysin:inst10.fcos_o[4]
cosout[5] <= mysin:inst10.fcos_o[5]
cosout[6] <= mysin:inst10.fcos_o[6]
cosout[7] <= mysin:inst10.fcos_o[7]
cosout[8] <= mysin:inst10.fcos_o[8]
cosout[9] <= mysin:inst10.fcos_o[9]
cosout[10] <= mysin:inst10.fcos_o[10]
cosout[11] <= mysin:inst10.fcos_o[11]
result[0] <= lpm_mux0:inst13.result[0]
result[1] <= lpm_mux0:inst13.result[1]
result[2] <= lpm_mux0:inst13.result[2]
result[3] <= lpm_mux0:inst13.result[3]
result[4] <= lpm_mux0:inst13.result[4]
result[5] <= lpm_mux0:inst13.result[5]
result[6] <= lpm_mux0:inst13.result[6]
result[7] <= lpm_mux0:inst13.result[7]
result[8] <= lpm_mux0:inst13.result[8]
result[9] <= lpm_mux0:inst13.result[9]
result[10] <= lpm_mux0:inst13.result[10]
result[11] <= lpm_mux0:inst13.result[11]
key0 => AM:inst17.key
sw_2 => lpm_mux0:inst13.sel[1]
sw_3 => lpm_mux0:inst13.sel[0]


|sinsignal|mysin:inst10
phi_inc_i[0] => mysin_st:mysin_st_inst.phi_inc_i[0]
phi_inc_i[1] => mysin_st:mysin_st_inst.phi_inc_i[1]
phi_inc_i[2] => mysin_st:mysin_st_inst.phi_inc_i[2]
phi_inc_i[3] => mysin_st:mysin_st_inst.phi_inc_i[3]
phi_inc_i[4] => mysin_st:mysin_st_inst.phi_inc_i[4]
phi_inc_i[5] => mysin_st:mysin_st_inst.phi_inc_i[5]
phi_inc_i[6] => mysin_st:mysin_st_inst.phi_inc_i[6]
phi_inc_i[7] => mysin_st:mysin_st_inst.phi_inc_i[7]
phi_inc_i[8] => mysin_st:mysin_st_inst.phi_inc_i[8]
phi_inc_i[9] => mysin_st:mysin_st_inst.phi_inc_i[9]
phi_inc_i[10] => mysin_st:mysin_st_inst.phi_inc_i[10]
phi_inc_i[11] => mysin_st:mysin_st_inst.phi_inc_i[11]
phi_inc_i[12] => mysin_st:mysin_st_inst.phi_inc_i[12]
phi_inc_i[13] => mysin_st:mysin_st_inst.phi_inc_i[13]
phi_inc_i[14] => mysin_st:mysin_st_inst.phi_inc_i[14]
phi_inc_i[15] => mysin_st:mysin_st_inst.phi_inc_i[15]
phi_inc_i[16] => mysin_st:mysin_st_inst.phi_inc_i[16]
phi_inc_i[17] => mysin_st:mysin_st_inst.phi_inc_i[17]
phi_inc_i[18] => mysin_st:mysin_st_inst.phi_inc_i[18]
phi_inc_i[19] => mysin_st:mysin_st_inst.phi_inc_i[19]
phi_inc_i[20] => mysin_st:mysin_st_inst.phi_inc_i[20]
phi_inc_i[21] => mysin_st:mysin_st_inst.phi_inc_i[21]
phi_inc_i[22] => mysin_st:mysin_st_inst.phi_inc_i[22]
phi_inc_i[23] => mysin_st:mysin_st_inst.phi_inc_i[23]
phi_inc_i[24] => mysin_st:mysin_st_inst.phi_inc_i[24]
phi_inc_i[25] => mysin_st:mysin_st_inst.phi_inc_i[25]
phi_inc_i[26] => mysin_st:mysin_st_inst.phi_inc_i[26]
phi_inc_i[27] => mysin_st:mysin_st_inst.phi_inc_i[27]
phi_inc_i[28] => mysin_st:mysin_st_inst.phi_inc_i[28]
phi_inc_i[29] => mysin_st:mysin_st_inst.phi_inc_i[29]
phi_inc_i[30] => mysin_st:mysin_st_inst.phi_inc_i[30]
phi_inc_i[31] => mysin_st:mysin_st_inst.phi_inc_i[31]
clk => mysin_st:mysin_st_inst.clk
reset => mysin_st:mysin_st_inst.reset
clken => mysin_st:mysin_st_inst.clken
fsin_o[0] <= mysin_st:mysin_st_inst.fsin_o[0]
fsin_o[1] <= mysin_st:mysin_st_inst.fsin_o[1]
fsin_o[2] <= mysin_st:mysin_st_inst.fsin_o[2]
fsin_o[3] <= mysin_st:mysin_st_inst.fsin_o[3]
fsin_o[4] <= mysin_st:mysin_st_inst.fsin_o[4]
fsin_o[5] <= mysin_st:mysin_st_inst.fsin_o[5]
fsin_o[6] <= mysin_st:mysin_st_inst.fsin_o[6]
fsin_o[7] <= mysin_st:mysin_st_inst.fsin_o[7]
fsin_o[8] <= mysin_st:mysin_st_inst.fsin_o[8]
fsin_o[9] <= mysin_st:mysin_st_inst.fsin_o[9]
fsin_o[10] <= mysin_st:mysin_st_inst.fsin_o[10]
fsin_o[11] <= mysin_st:mysin_st_inst.fsin_o[11]
fcos_o[0] <= mysin_st:mysin_st_inst.fcos_o[0]
fcos_o[1] <= mysin_st:mysin_st_inst.fcos_o[1]
fcos_o[2] <= mysin_st:mysin_st_inst.fcos_o[2]
fcos_o[3] <= mysin_st:mysin_st_inst.fcos_o[3]
fcos_o[4] <= mysin_st:mysin_st_inst.fcos_o[4]
fcos_o[5] <= mysin_st:mysin_st_inst.fcos_o[5]
fcos_o[6] <= mysin_st:mysin_st_inst.fcos_o[6]
fcos_o[7] <= mysin_st:mysin_st_inst.fcos_o[7]
fcos_o[8] <= mysin_st:mysin_st_inst.fcos_o[8]
fcos_o[9] <= mysin_st:mysin_st_inst.fcos_o[9]
fcos_o[10] <= mysin_st:mysin_st_inst.fcos_o[10]
fcos_o[11] <= mysin_st:mysin_st_inst.fcos_o[11]
data_ready <= mysin_st:mysin_st_inst.data_ready


|sinsignal|mysin:inst10|mysin_st:mysin_st_inst
clk => clk~0.IN12
reset => reset~0.IN10
clken => clken~0.IN12
phi_inc_i[0] => phi_inc_i_w[0].IN1
phi_inc_i[1] => phi_inc_i_w[1].IN1
phi_inc_i[2] => phi_inc_i_w[2].IN1
phi_inc_i[3] => phi_inc_i_w[3].IN1
phi_inc_i[4] => phi_inc_i_w[4].IN1
phi_inc_i[5] => phi_inc_i_w[5].IN1
phi_inc_i[6] => phi_inc_i_w[6].IN1
phi_inc_i[7] => phi_inc_i_w[7].IN1
phi_inc_i[8] => phi_inc_i_w[8].IN1
phi_inc_i[9] => phi_inc_i_w[9].IN1
phi_inc_i[10] => phi_inc_i_w[10].IN1
phi_inc_i[11] => phi_inc_i_w[11].IN1
phi_inc_i[12] => phi_inc_i_w[12].IN1
phi_inc_i[13] => phi_inc_i_w[13].IN1
phi_inc_i[14] => phi_inc_i_w[14].IN1
phi_inc_i[15] => phi_inc_i_w[15].IN1
phi_inc_i[16] => phi_inc_i_w[16].IN1
phi_inc_i[17] => phi_inc_i_w[17].IN1
phi_inc_i[18] => phi_inc_i_w[18].IN1
phi_inc_i[19] => phi_inc_i_w[19].IN1
phi_inc_i[20] => phi_inc_i_w[20].IN1
phi_inc_i[21] => phi_inc_i_w[21].IN1
phi_inc_i[22] => phi_inc_i_w[22].IN1
phi_inc_i[23] => phi_inc_i_w[23].IN1
phi_inc_i[24] => phi_inc_i_w[24].IN1
phi_inc_i[25] => phi_inc_i_w[25].IN1
phi_inc_i[26] => phi_inc_i_w[26].IN1
phi_inc_i[27] => phi_inc_i_w[27].IN1
phi_inc_i[28] => phi_inc_i_w[28].IN1
phi_inc_i[29] => phi_inc_i_w[29].IN1
phi_inc_i[30] => phi_inc_i_w[30].IN1
phi_inc_i[31] => phi_inc_i_w[31].IN1
fsin_o[0] <= asj_nco_mob_rw:ux122.data_out
fsin_o[1] <= asj_nco_mob_rw:ux122.data_out
fsin_o[2] <= asj_nco_mob_rw:ux122.data_out
fsin_o[3] <= asj_nco_mob_rw:ux122.data_out
fsin_o[4] <= asj_nco_mob_rw:ux122.data_out
fsin_o[5] <= asj_nco_mob_rw:ux122.data_out
fsin_o[6] <= asj_nco_mob_rw:ux122.data_out
fsin_o[7] <= asj_nco_mob_rw:ux122.data_out
fsin_o[8] <= asj_nco_mob_rw:ux122.data_out
fsin_o[9] <= asj_nco_mob_rw:ux122.data_out
fsin_o[10] <= asj_nco_mob_rw:ux122.data_out
fsin_o[11] <= asj_nco_mob_rw:ux122.data_out
fcos_o[0] <= asj_nco_mob_rw:ux123.data_out
fcos_o[1] <= asj_nco_mob_rw:ux123.data_out
fcos_o[2] <= asj_nco_mob_rw:ux123.data_out
fcos_o[3] <= asj_nco_mob_rw:ux123.data_out
fcos_o[4] <= asj_nco_mob_rw:ux123.data_out
fcos_o[5] <= asj_nco_mob_rw:ux123.data_out
fcos_o[6] <= asj_nco_mob_rw:ux123.data_out
fcos_o[7] <= asj_nco_mob_rw:ux123.data_out
fcos_o[8] <= asj_nco_mob_rw:ux123.data_out
fcos_o[9] <= asj_nco_mob_rw:ux123.data_out
fcos_o[10] <= asj_nco_mob_rw:ux123.data_out
fcos_o[11] <= asj_nco_mob_rw:ux123.data_out
data_ready <= asj_nco_isdr:ux710isdr.data_ready


|sinsignal|mysin:inst10|mysin_st:mysin_st_inst|asj_xnqg:u011
phi_a[0] => ~NO_FANOUT~
phi_a[1] => ~NO_FANOUT~
phi_a[2] => ~NO_FANOUT~
phi_a[3] => ~NO_FANOUT~
phi_a[4] => ~NO_FANOUT~
phi_a[5] => ~NO_FANOUT~
phi_a[6] => ~NO_FANOUT~
phi_a[7] => ~NO_FANOUT~
phi_a[8] => ~NO_FANOUT~
phi_a[9] => ~NO_FANOUT~
phi_a[10] => ~NO_FANOUT~
phi_a[11] => ~NO_FANOUT~
phi_a[12] => ~NO_FANOUT~
phi_a[13] => ~NO_FANOUT~
phi_a[14] => ~NO_FANOUT~
phi_a[15] => ~NO_FANOUT~
phi_a[16] => ~NO_FANOUT~
phi_a[17] => ~NO_FANOUT~
phi_a[18] => xnq[0].DATAIN
phi_a[19] => xnq[1].DATAIN
phi_a[20] => xnq[2].DATAIN
xnq[0] <= phi_a[18].DB_MAX_OUTPUT_PORT_TYPE
xnq[1] <= phi_a[19].DB_MAX_OUTPUT_PORT_TYPE
xnq[2] <= phi_a[20].DB_MAX_OUTPUT_PORT_TYPE


|sinsignal|mysin:inst10|mysin_st:mysin_st_inst|segment_arr_tdl:tdl
clk => segment_arr[3][2].CLK
clk => segment_arr[3][1].CLK
clk => segment_arr[3][0].CLK
clk => segment_arr[2][2].CLK
clk => segment_arr[2][1].CLK
clk => segment_arr[2][0].CLK
clk => segment_arr[1][2].CLK
clk => segment_arr[1][1].CLK
clk => segment_arr[1][0].CLK
clk => segment_arr[0][2].CLK
clk => segment_arr[0][1].CLK
clk => segment_arr[0][0].CLK
clk => seg_rot[2]~reg0.CLK
clk => seg_rot[1]~reg0.CLK
clk => seg_rot[0]~reg0.CLK
clken => segment_arr~0.OUTPUTSELECT
clken => segment_arr~1.OUTPUTSELECT
clken => segment_arr~2.OUTPUTSELECT
clken => segment_arr~3.OUTPUTSELECT
clken => segment_arr~4.OUTPUTSELECT
clken => segment_arr~5.OUTPUTSELECT
clken => segment_arr~6.OUTPUTSELECT
clken => segment_arr~7.OUTPUTSELECT
clken => segment_arr~8.OUTPUTSELECT
clken => segment_arr~9.OUTPUTSELECT
clken => segment_arr~10.OUTPUTSELECT
clken => segment_arr~11.OUTPUTSELECT
clken => seg_rot~0.OUTPUTSELECT
clken => seg_rot~1.OUTPUTSELECT
clken => seg_rot~2.OUTPUTSELECT
reset => segment_arr~12.OUTPUTSELECT
reset => segment_arr~13.OUTPUTSELECT
reset => segment_arr~14.OUTPUTSELECT
reset => segment_arr~15.OUTPUTSELECT
reset => segment_arr~16.OUTPUTSELECT
reset => segment_arr~17.OUTPUTSELECT
reset => segment_arr~18.OUTPUTSELECT
reset => segment_arr~19.OUTPUTSELECT
reset => segment_arr~20.OUTPUTSELECT
reset => segment_arr~21.OUTPUTSELECT
reset => segment_arr~22.OUTPUTSELECT
reset => segment_arr~23.OUTPUTSELECT
reset => seg_rot~3.OUTPUTSELECT
reset => seg_rot~4.OUTPUTSELECT
reset => seg_rot~5.OUTPUTSELECT
current_seg[0] => segment_arr~11.DATAB
current_seg[1] => segment_arr~10.DATAB
current_seg[2] => segment_arr~9.DATAB
seg_rot[0] <= seg_rot[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
seg_rot[1] <= seg_rot[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
seg_rot[2] <= seg_rot[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|sinsignal|mysin:inst10|mysin_st:mysin_st_inst|asj_altqmcpipe:ux000
clk => clk~0.IN1
reset => reset~0.IN1
clken => clken~0.IN1
phi_inc_int[0] => phi_int_arr_reg~63.DATAB
phi_inc_int[1] => phi_int_arr_reg~62.DATAB
phi_inc_int[2] => phi_int_arr_reg~61.DATAB
phi_inc_int[3] => phi_int_arr_reg~60.DATAB
phi_inc_int[4] => phi_int_arr_reg~59.DATAB
phi_inc_int[5] => phi_int_arr_reg~58.DATAB
phi_inc_int[6] => phi_int_arr_reg~57.DATAB
phi_inc_int[7] => phi_int_arr_reg~56.DATAB
phi_inc_int[8] => phi_int_arr_reg~55.DATAB
phi_inc_int[9] => phi_int_arr_reg~54.DATAB
phi_inc_int[10] => phi_int_arr_reg~53.DATAB
phi_inc_int[11] => phi_int_arr_reg~52.DATAB
phi_inc_int[12] => phi_int_arr_reg~51.DATAB
phi_inc_int[13] => phi_int_arr_reg~50.DATAB
phi_inc_int[14] => phi_int_arr_reg~49.DATAB
phi_inc_int[15] => phi_int_arr_reg~48.DATAB
phi_inc_int[16] => phi_int_arr_reg~47.DATAB
phi_inc_int[17] => phi_int_arr_reg~46.DATAB
phi_inc_int[18] => phi_int_arr_reg~45.DATAB
phi_inc_int[19] => phi_int_arr_reg~44.DATAB
phi_inc_int[20] => phi_int_arr_reg~43.DATAB
phi_inc_int[21] => phi_int_arr_reg~42.DATAB
phi_inc_int[22] => phi_int_arr_reg~41.DATAB
phi_inc_int[23] => phi_int_arr_reg~40.DATAB
phi_inc_int[24] => phi_int_arr_reg~39.DATAB
phi_inc_int[25] => phi_int_arr_reg~38.DATAB
phi_inc_int[26] => phi_int_arr_reg~37.DATAB
phi_inc_int[27] => phi_int_arr_reg~36.DATAB
phi_inc_int[28] => phi_int_arr_reg~35.DATAB
phi_inc_int[29] => phi_int_arr_reg~34.DATAB
phi_inc_int[30] => phi_int_arr_reg~33.DATAB
phi_inc_int[31] => phi_int_arr_reg~32.DATAB
phi_acc_reg[0] <= phi_out_w[0].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[1] <= phi_out_w[1].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[2] <= phi_out_w[2].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[3] <= phi_out_w[3].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[4] <= phi_out_w[4].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[5] <= phi_out_w[5].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[6] <= phi_out_w[6].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[7] <= phi_out_w[7].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[8] <= phi_out_w[8].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[9] <= phi_out_w[9].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[10] <= phi_out_w[10].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[11] <= phi_out_w[11].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[12] <= phi_out_w[12].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[13] <= phi_out_w[13].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[14] <= phi_out_w[14].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[15] <= phi_out_w[15].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[16] <= phi_out_w[16].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[17] <= phi_out_w[17].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[18] <= phi_out_w[18].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[19] <= phi_out_w[19].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[20] <= phi_out_w[20].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[21] <= phi_out_w[21].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[22] <= phi_out_w[22].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[23] <= phi_out_w[23].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[24] <= phi_out_w[24].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[25] <= phi_out_w[25].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[26] <= phi_out_w[26].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[27] <= phi_out_w[27].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[28] <= phi_out_w[28].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[29] <= phi_out_w[29].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[30] <= phi_out_w[30].DB_MAX_OUTPUT_PORT_TYPE
phi_acc_reg[31] <= phi_out_w[31].DB_MAX_OUTPUT_PORT_TYPE


|sinsignal|mysin:inst10|mysin_st:mysin_st_inst|asj_altqmcpipe:ux000|lpm_add_sub:acc
dataa[0] => add_sub_pah:auto_generated.dataa[0]
dataa[1] => add_sub_pah:auto_generated.dataa[1]
dataa[2] => add_sub_pah:auto_generated.dataa[2]
dataa[3] => add_sub_pah:auto_generated.dataa[3]
dataa[4] => add_sub_pah:auto_generated.dataa[4]
dataa[5] => add_sub_pah:auto_generated.dataa[5]
dataa[6] => add_sub_pah:auto_generated.dataa[6]
dataa[7] => add_sub_pah:auto_generated.dataa[7]
dataa[8] => add_sub_pah:auto_generated.dataa[8]
dataa[9] => add_sub_pah:auto_generated.dataa[9]
dataa[10] => add_sub_pah:auto_generated.dataa[10]
dataa[11] => add_sub_pah:auto_generated.dataa[11]
dataa[12] => add_sub_pah:auto_generated.dataa[12]
dataa[13] => add_sub_pah:auto_generated.dataa[13]
dataa[14] => add_sub_pah:auto_generated.dataa[14]
dataa[15] => add_sub_pah:auto_generated.dataa[15]
dataa[16] => add_sub_pah:auto_generated.dataa[16]
dataa[17] => add_sub_pah:auto_generated.dataa[17]
dataa[18] => add_sub_pah:auto_generated.dataa[18]
dataa[19] => add_sub_pah:auto_generated.dataa[19]
dataa[20] => add_sub_pah:auto_generated.dataa[20]
dataa[21] => add_sub_pah:auto_generated.dataa[21]