stp1.stp

来自「fpga的应用」· STP 代码 · 共 279 行 · 第 1/5 页

          <wire connection_status="true" name="datain[9]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="result[0]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[10]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[11]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[1]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[2]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[3]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[4]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[5]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[6]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[7]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[8]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="result[9]" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="sinout[0]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[10]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[11]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[1]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[2]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[3]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[4]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[5]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[6]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[7]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[8]" tap_mode="classic" type="combinatorial"/>
          <wire connection_status="true" name="sinout[9]" tap_mode="classic" type="combinatorial"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="datain" order="msb_to_lsb" radix="hex" state="collapse" type="combinatorial">
            <net is_signal_inverted="no" name="datain[31]"/>
            <net is_signal_inverted="no" name="datain[30]"/>
            <net is_signal_inverted="no" name="datain[29]"/>
            <net is_signal_inverted="no" name="datain[28]"/>
            <net is_signal_inverted="no" name="datain[27]"/>
            <net is_signal_inverted="no" name="datain[26]"/>
            <net is_signal_inverted="no" name="datain[25]"/>
            <net is_signal_inverted="no" name="datain[24]"/>
            <net is_signal_inverted="no" name="datain[23]"/>
            <net is_signal_inverted="no" name="datain[22]"/>
            <net is_signal_inverted="no" name="datain[21]"/>
            <net is_signal_inverted="no" name="datain[20]"/>
            <net is_signal_inverted="no" name="datain[19]"/>
            <net is_signal_inverted="no" name="datain[18]"/>
            <net is_signal_inverted="no" name="datain[17]"/>
            <net is_signal_inverted="no" name="datain[16]"/>
            <net is_signal_inverted="no" name="datain[15]"/>
            <net is_signal_inverted="no" name="datain[14]"/>
            <net is_signal_inverted="no" name="datain[13]"/>
            <net is_signal_inverted="no" name="datain[12]"/>
            <net is_signal_inverted="no" name="datain[11]"/>
            <net is_signal_inverted="no" name="datain[10]"/>
            <net is_signal_inverted="no" name="datain[9]"/>
            <net is_signal_inverted="no" name="datain[8]"/>
            <net is_signal_inverted="no" name="datain[7]"/>
            <net is_signal_inverted="no" name="datain[6]"/>