altpll1_waveforms.html

来自「fpga的应用」· HTML 代码 · 共 14 行

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<html>
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<title>Sample Waveforms for altpll1.vhd </title>
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<h2><CENTER>Sample behavioral waveforms for design file altpll1.vhd </CENTER></h2>
<P>The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design altpll1.vhd. The design altpll1.vhd has Cyclone II FAST pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 20000 ps. CLK0 multiply by = 2, CLK0 divide by = 1, CLK0 phase_shift = 0 CLK1 multiply by = 1, CLK1 divide by = 5, CLK1 phase_shift = 0 </P>
<CENTER><img src=altpll1_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing NORMAL mode operation. </CENTER></P>
<P><FONT size=3></P>
<P></P>
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</html>

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