sinsignal.map.rpt

fpga的应用

; Auto Open-Drain Pins                                               ; On                 ; On                 ;
; Remove Duplicate Logic                                             ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                              ; Off                ; Off                ;
; Perform gate-level register retiming                               ; Off                ; Off                ;
; Allow register retiming to trade off Tsu/Tco with Fmax             ; On                 ; On                 ;
; Auto ROM Replacement                                               ; On                 ; On                 ;
; Auto RAM Replacement                                               ; On                 ; On                 ;
; Auto Shift Register Replacement                                    ; On                 ; On                 ;
; Auto Clock Enable Replacement                                      ; On                 ; On                 ;
; Allow Synchronous Control Signals                                  ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                             ; Off                ; Off                ;
; Auto Resource Sharing                                              ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                 ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                 ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                      ; Off                ; Off                ;
; Maximum Number of M4K Memory Blocks                                ; Unlimited          ; Unlimited          ;
; Ignore translate_off and translate_on Synthesis Directives         ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report                 ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                 ; Off                ; Off                ;
; Retiming Meta-Stability Register Sequence Length                   ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                       ; Normal compilation ; Normal compilation ;
; HDL message level                                                  ; Level2             ; Level2             ;
+--------------------------------------------------------------------+--------------------+--------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                 ;
+----------------------------------+-----------------+------------------------------------+------------------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type                          ; File Name with Absolute Path                                                 ;
+----------------------------------+-----------------+------------------------------------+------------------------------------------------------------------------------+
; cnt1000.vhd                      ; yes             ; User VHDL File                     ; G:/study/code/eda/cnt1000.vhd                                                ;
; sinsignal.bdf                    ; yes             ; User Block Diagram/Schematic File  ; G:/study/code/eda/sinsignal.bdf                                              ;
; mysin_st.v                       ; yes             ; User Verilog HDL File              ; G:/study/code/eda/mysin_st.v                                                 ;
; mysin.vhd                        ; yes             ; User VHDL File                     ; G:/study/code/eda/mysin.vhd                                                  ;
; ASK.vhd                          ; yes             ; User VHDL File                     ; G:/study/code/eda/ASK.vhd                                                    ;
; PSK.vhd                          ; yes             ; User VHDL File                     ; G:/study/code/eda/PSK.vhd                                                    ;
; div10.vhd                        ; yes             ; User VHDL File                     ; G:/study/code/eda/div10.vhd                                                  ;
; key_delay.vhd                    ; yes             ; User VHDL File                     ; G:/study/code/eda/key_delay.vhd                                              ;
; div1000.vhd                      ; yes             ; User VHDL File                     ; G:/study/code/eda/div1000.vhd                                                ;
; div40.vhd                        ; yes             ; User VHDL File                     ; G:/study/code/eda/div40.vhd                                                  ;
; FM.bdf                           ; yes             ; User Block Diagram/Schematic File  ; G:/study/code/eda/FM.bdf                                                     ;
; cnt10.vhd                        ; yes             ; User VHDL File                     ; G:/study/code/eda/cnt10.vhd                                                  ;
; AM.bdf                           ; yes             ; User Block Diagram/Schematic File  ; G:/study/code/eda/AM.bdf                                                     ;
; addcon.vhd                       ; yes             ; User VHDL File                     ; G:/study/code/eda/addcon.vhd                                                 ;
; div200.vhd                       ; yes             ; User VHDL File                     ; G:/study/code/eda/div200.vhd                                                 ;
; PSK_ASK.bdf                      ; yes             ; User Block Diagram/Schematic File  ; G:/study/code/eda/PSK_ASK.bdf                                                ;
; asj_xnqg.v                       ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_xnqg.v                           ;
; segment_arr_tdl.v                ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/segment_arr_tdl.v                    ;
; asj_altqmcpipe.v                 ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_altqmcpipe.v                     ;
; lpm_add_sub.tdf                  ; yes             ; Megafunction                       ; d:/tools/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf            ;
; addcore.inc                      ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/addcore.inc                ;
; look_add.inc                     ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/look_add.inc               ;
; bypassff.inc                     ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/bypassff.inc               ;
; altshift.inc                     ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altshift.inc               ;
; alt_stratix_add_sub.inc          ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/alt_stratix_add_sub.inc    ;
; alt_mercury_add_sub.inc          ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/alt_mercury_add_sub.inc    ;
; aglobal60.inc                    ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/aglobal60.inc              ;
; db/add_sub_pah.tdf               ; yes             ; Auto-Generated Megafunction        ; G:/study/code/eda/db/add_sub_pah.tdf                                         ;
; asj_dxx_g.v                      ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_dxx_g.v                          ;
; asj_dxx.v                        ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_dxx.v                            ;
; db/add_sub_k3h.tdf               ; yes             ; Auto-Generated Megafunction        ; G:/study/code/eda/db/add_sub_k3h.tdf                                         ;
; asj_nco_apr_dxx.v                ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_nco_apr_dxx.v                    ;
; asj_gar.v                        ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_gar.v                            ;
; sid_2c_1p.v                      ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/sid_2c_1p.v                          ;
; asj_nco_as_m_cen.v               ; yes             ; Encrypted OpenCore/OpenCore+ File  ; D:/tools/altera/megacore/nco-v2.3.1/lib/asj_nco_as_m_cen.v                   ;
; altsyncram.tdf                   ; yes             ; Megafunction                       ; d:/tools/altera/quartus60/libraries/megafunctions/altsyncram.tdf             ;
; stratix_ram_block.inc            ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/stratix_ram_block.inc      ;
; lpm_mux.inc                      ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/lpm_mux.inc                ;
; lpm_decode.inc                   ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/lpm_decode.inc             ;
; altsyncram.inc                   ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altsyncram.inc             ;
; a_rdenreg.inc                    ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/a_rdenreg.inc              ;
; altrom.inc                       ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altrom.inc                 ;
; altram.inc                       ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altram.inc                 ;
; altdpram.inc                     ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altdpram.inc               ;
; altqpram.inc                     ; yes             ; Other                              ; d:/tools/altera/quartus60/libraries/megafunctions/altqpram.inc               ;
; db/altsyncram_g091.tdf           ; yes             ; Auto-Generated Megafunction        ; G:/study/code/eda/db/altsyncram_g091.tdf                                     ;
; db/mux_rjb.tdf                   ; yes             ; Auto-Generated Megafunction        ; G:/study/code/eda/db/mux_rjb.tdf                                             ;