vportdisn.c

在CCS环境下的一个视频采集源代码

/**********************************************************/
/* Display parameter definitions based on 525/60 format */
/**********************************************************/

/* Define frame size */
#define VD_FRM_WIDTH 858 
#define VD_FRM_HEIGHT 525 	/* total no of lines per frame */
#define VD_FRM_SIZE (VD_FRM_WIDTH * VD_FRM_HEIGHT)

/* Horizontal blanking */
#define VD_HBLNK_START 720 	/* starting location of EAV */
#define VD_HBLNK_STOP 856 	/* 856 starting location of SAV */
#define VD_HBLNK_SIZE (VD_HBLNK_STOP - VD_HBLNK_START + 2/*EAV*/) /* (138) EAV, SAV inclusive */

/* Define field bit(VD_FBIT) reg values */
#define VD_FBIT_CLR  4		/* first line with an EAV with F=0 indicating Field 1 display*/
#define VD_FBIT_SET  266 	/* first line with an EAV with F=1 indicating Field 2 display*/

/* Define vertical blanking bit(VD_VBITn) reg values */
#define VD_VBIT_SET1 1  
#define VD_VBIT_CLR1 20	//20 
#define VD_VBLNK1_SIZE (VD_VBIT_CLR1 - VD_VBIT_SET1) /* 19 lines */
#define VD_VBIT_SET2 263  //264
#define VD_VBIT_CLR2 283 //283 
#define VD_VBLNK2_SIZE (VD_VBIT_CLR2 - VD_VBIT_SET2) /* 19 lines */

/* Image offsets for both the fields */
#define VD_IMG_HOFF1 0 
#define VD_IMG_VOFF1 5 // 5
#define VD_IMG_HOFF2 0
#define VD_IMG_VOFF2 0
/* Image active vertical and horizontal sizes */
#define VD_IMG_HSIZE1 720 /* field1 horizontal image size */
#define VD_IMG_VSIZE1 240 /* 240 field1 vertical image size */
#define VD_IMG_HSIZE2 720 /* field2 horizontal image size */
#define VD_IMG_VSIZE2 243 /* 243 field2 vertical image size */

/* ................................................. */
//                ignored section
/* ................................................. */

/* Horzontal synchronization */
#define VD_HSYNC_START 736
#define VD_HSYNC_STOP 800

/* Vertical blanking for field1 */
#define VD_VBLNK_XSTART1 720 /* pixel on which VBLNK active 720 */
#define VD_VBLNK_YSTART1 1 /* line on which VBLNK active */
#define VD_VBLNK_XSTOP1 720 /* pixel on which VBLNK inactive 720 */
#define VD_VBLNK_YSTOP1 20 /* line on which VBLNK inactive 20*/
/* Vertical blanking for field2 */
#define VD_VBLNK_XSTART2 360 /* pixel on which VBLNK active 360 */
#define VD_VBLNK_YSTART2 263 /* line on which VBLNK active */
#define VD_VBLNK_XSTOP2 360 /* pixel on which VBLNK inactive 360 */
#define VD_VBLNK_YSTOP2 283 /* line on which VBLNK inactive 283 */

/* Define vertical synchronization for field1 */
#define VD_VSYNC_XSTART1 720
#define VD_VSYNC_YSTART1 4   
#define VD_VSYNC_XSTOP1 720
#define VD_VSYNC_YSTOP1 7 
/* Define vertical synchronization for field2 */
#define VD_VSYNC_XSTART2 360
#define VD_VSYNC_YSTART2 266 
#define VD_VSYNC_XSTOP2 360
#define VD_VSYNC_YSTOP2 269 

/* Field timing */
#define VD_FIELD1_XSTART 720
#define VD_FIELD1_YSTART 1
#define VD_FIELD2_XSTART 360
#define VD_FIELD2_YSTART 263
/* ................................................. */
//                ignored section
/* ................................................. */

/* Manipulate field1 and field2 image sizes */
#define VD_IMAGE_SIZE1 (VD_IMG_HSIZE1 * VD_IMG_VSIZE1)
#define VD_IMAGE_SIZE2 (VD_IMG_HSIZE2 * VD_IMG_VSIZE2)
/* Define threshold values in double-words. Both fields should */
/* have same threshold value */
#define VD_VDTHRLD1 (VD_IMG_HSIZE1/8) /* line length in */
#define VD_VDTHRLD2 VD_VDTHRLD1 /* double-words */
/* Define number of events to be generated for field1 and field2 */
#define VD_DISPEVT1 (VD_IMAGE_SIZE1 / (VD_VDTHRLD1 * 8))
#define VD_DISPEVT2 (VD_IMAGE_SIZE2 / (VD_VDTHRLD2 * 8))

#define DISPLAY_FRAME_COUNT 1
/* ............................................ */
/* EDMA parameters for display Y event that are */
/* specific to this example. */
/* ............................................ */
/* VD_VDTHRLDn is in double-words and 32-bit element size */
#define VD_Y_EDMA_ELECNT (VD_VDTHRLD1 * 2) 
#define VD_Y_EDMA_FRMCNT ((VD_DISPEVT1 + VD_DISPEVT2) * DISPLAY_FRAME_COUNT)
/******************************************************************/
/* Description : 8.bit BT.656 non.continuous frame display */
/* */
/* Some important field descriptions: */
/* */
/* DMODE = 000, 8.bit BT.656 mode */
/* CON = 0 */
/* FRAME = 1, display frame */
/* DF2 = 0 */
/* DF1 = 0, (8.bit non.continuous frame display) */
/* SCALE = 0, no scaling */
/* RESMPL = 0, no resampling */
/* DPK = X, not used in 8.bit display */
/* RSYNC = X, used in Raw mode(Enable second synchronized raw */
/* data channel) */
/* RGBX = X, used in Raw mode(RGB extract enable. Perform */
/* 3/4 FIFO unpacking) */
/* VCTL1S = 00, output HSYNC */
/* VCTL2S = 00, output VSYNC */
/* VCTL3S = 0, output CBLNK */
/* HXS = 0, VCTL1 is an output */
/* VXS = 0, VCTL2 is an output */
/* FXS = 0, VCTL3 is an output */
/* PVPSYN = 0, no previous port synchronization */
/******************************************************************/
#include <vportdis.h>
#include "vportcap.h"
/*................................................................ */
/* global variable declarations */
/* ............................................................... */

//	Uint32 disChaAYSpace  = 0x80000000;
//	Uint32 disChaACbSpace = 0x800675c0; 
//	Uint32 disChaACrSpace = 0x8009b0a0;

	#pragma DATA_SECTION(disChaAYSpace, ".disChaAYSpace") 
	/* buffer to store captured Y-data */
	Uint8 disChaAYSpace[720*588]; 
	#pragma DATA_SECTION(disChaACbSpace, ".disChaACbSpace")
	/* buffer to store captured Cb-data */
	Uint8 disChaACbSpace[360*588]; 
	#pragma DATA_SECTION(disChaACrSpace, ".disChaACrSpace")
	/* buffer to store captured Cr-data */
	Uint8 disChaACrSpace[360*588];
	
	/* handle of vp that to be configured */
	VP_Handle vpDisplayHandle; 
	EDMA_Handle hEdmaVPDispY;
	EDMA_Handle hEdmaVPDispCb;
	EDMA_Handle hEdmaVPDispCr;
	Int32 edmaDispYTccNum = 0; /* EDMA tcc for Y channel */
	Int32 edmaDispCbTccNum = 0; /* EDMA tcc for Cb channel */
	Int32 edmaDispCrTccNum = 0; /* EDMA tcc for Cb channel */
	volatile Uint32 displayFrameCount = 0; /* no of frames that are */
	/* displayed */
	volatile Uint32 dispUnderrun = 0; /* underrun error flag */
	volatile Uint32 disNewFrame =0;
/*................................................................ */
/* Function : bt656_8bit_ncfd */
/* Input(s) : portNumber, video port number i.e. 0, 1 or 2. */
/* Description : Configures given video port for 8.bit BT.656 non. */
/* continuous frame display. */
/*................................................................ */
VP_Handle bt656_8bit_ncfd(int portNumber)
{
	/* Open video port for display ，打开一个视频口*/
	vpDisplayHandle = VP_open(portNumber, VP_OPEN_RESET);
	if(vpDisplayHandle == INV)
	{
		return (VP_Handle)0xFFFF;
	}
	/*使能视频口*/
	/* Enable video port functionality in VP Peripheral Control Reg(PCR)*/
	VP_FSETH(vpDisplayHandle , PCR, PEREN, VP_PCR_PEREN_ENABLE);
	/* Set this port to display mode，将此口设为显示模式 */
	VP_FSETH(vpDisplayHandle , VPCTL, DISP, VP_VPCTL_DISP_DISPLAY);
	/* ..................... */
	/* Enable all interrupts */
	/* ..................... */
	/*使能相应的中断源*/
	/* enable display complete interrupt */
	VP_FSETH(vpDisplayHandle , VPIE, DCMP, VP_VPIE_DCMP_ENABLE);
	/* enable display underrun interrupt */
	VP_FSETH(vpDisplayHandle , VPIE, DUND, VP_VPIE_DUND_ENABLE);
	/* enable video port global interrupt enable */
	VP_FSETH(vpDisplayHandle , VPIE, VIE, VP_VPIE_VIE_ENABLE);
	/* .................... */
	/* Set all other fields */
	/* .................... */
	/* set frame size ，设置显示帧的大小*/
	VP_RSETH(vpDisplayHandle , VDFRMSZ,VP_VDFRMSZ_RMK(VD_FRM_HEIGHT, VD_FRM_WIDTH));
	/*设置信号VBLNK的时序*/
	/* set horizontal blanking，设置水平消隐的起始位置与停止位置720～856 */
	VP_RSETH(vpDisplayHandle , VDHBLNK,VP_VDHBLNK_RMK(VD_HBLNK_STOP, 
													  VP_VDHBLNK_HBDLA_NONE,
													  VD_HBLNK_START));
	
	/* set vertical blanking start for field1，设置第一场的垂直消隐的位置 */
	VP_RSETH(vpDisplayHandle , VDVBLKS1,VP_VDVBLKS1_RMK(VD_VBLNK_YSTART1,
														VD_VBLNK_XSTART1));
	/* set vertical blanking end for field1 */
	VP_RSETH(vpDisplayHandle , VDVBLKE1,VP_VDVBLKE1_RMK(VD_VBLNK_YSTOP1, 
													    VD_VBLNK_XSTOP1));
	/* set vertical blanking start for field2 ，设置第二场的垂直消隐的位置*/
	VP_RSETH(vpDisplayHandle , VDVBLKS2,VP_VDVBLKS2_RMK(VD_VBLNK_YSTART2, 
													    VD_VBLNK_XSTART2));
	/* set vertical blanking end for field2 */
	VP_RSETH(vpDisplayHandle , VDVBLKE2,VP_VDVBLKE2_RMK(VD_VBLNK_YSTOP2, 
														VD_VBLNK_XSTOP2));
	/*设置EAV与SAV中的V位的值*/
	/* set vertical blanking bit register for field 1(VD_VBIT1) */
	/*设置第一场的消隐的行数*/
	VP_RSETH(vpDisplayHandle , VDVBIT1,VP_VDVBIT1_RMK(VD_VBIT_CLR1, 
											    	  VD_VBIT_SET1));
	/* set vertical blanking bit register for field 2(VD_VBIT2) */
	/*设置第二场的消隐的行数*/
	VP_RSETH(vpDisplayHandle , VDVBIT2,VP_VDVBIT2_RMK(VD_VBIT_CLR2, 
													  VD_VBIT_SET2));
	/* No image offsets in this example */
	/* set image size for field1,每一场设置图像的大小 */
	VP_RSETH(vpDisplayHandle , VDIMGSZ1,VP_VDIMGSZ1_RMK(VD_IMG_VSIZE1, 
														VD_IMG_HSIZE1));
	/* set image size for field2，设置第二场图像的大小 */
	VP_RSETH(vpDisplayHandle , VDIMGSZ2,VP_VDIMGSZ1_RMK(VD_IMG_VSIZE2, 
														VD_IMG_HSIZE2));
	/*设置FLD信号的逻辑*/
	/* set field1 timing ，设置第一场的起始点*/
	VP_RSETH(vpDisplayHandle , VDFLDT1,VP_VDFLDT1_RMK(VD_FIELD1_YSTART, VD_FIELD1_XSTART));
	/* set field2 timing ，设置第二场的起始点*/
	VP_RSETH(vpDisplayHandle , VDFLDT2,VP_VDFLDT2_RMK(VD_FIELD2_YSTART, VD_FIELD2_XSTART));
	/*设置EAV与SAV中的F位的值*/
	/* set display field bit register(VD_FBIT) */
	VP_RSETH(vpDisplayHandle , VDFBIT,VP_VDFBIT_RMK(VD_FBIT_SET, VD_FBIT_CLR));
	
	/* set horizontal sync control (VCTL1S) ，设置水平同步信号输出的控制*/
	VP_RSETH(vpDisplayHandle , VDHSYNC,VP_VDHSYNC_RMK(VD_HSYNC_STOP, VD_HSYNC_START));
	/*设置重直同步信号输出的控制*/
	/* set vertical sync start for field1 (VCTL1S) */
	VP_RSETH(vpDisplayHandle , VDVSYNS1,VP_VDVSYNS1_RMK(VD_VSYNC_YSTART1,VD_VSYNC_XSTART1));
	/* set vertical sync end for field1 (VCTL1S) */
	VP_RSETH(vpDisplayHandle , VDVSYNE1,VP_VDVSYNE1_RMK(VD_VSYNC_YSTOP1, VD_VSYNC_XSTOP1));
	/* set vertical sync start for field2 (VCTL2S) */
	VP_RSETH(vpDisplayHandle , VDVSYNS2,VP_VDVSYNS2_RMK(VD_VSYNC_YSTART2,VD_VSYNC_XSTART2));
	/* set vertical sync end for field2 (VCTL2S) */
	VP_RSETH(vpDisplayHandle , VDVSYNE2,VP_VDVSYNE2_RMK(VD_VSYNC_YSTOP2, VD_VSYNC_XSTOP2));
	/* Let clipping values to be their defaults (VD_CLIP) No need to set DEF_VAL and VD_RELOAD in this example*/
	/*设置中断事件*/
	/* set event register */
	VP_RSETH(vpDisplayHandle , VDDISPEVT,VP_VDDISPEVT_RMK(VD_DISPEVT2, VD_DISPEVT1));
	/* Vertical interrupts are not used in this example (VD_VINT) */
	/* set threshold value for DMA events */
	VP_RSETH(vpDisplayHandle, VDTHRLD,VP_VDTHRLD_RMK(VD_VDTHRLD2,
													 VP_VDTHRLD_INCPIX_DEFAULT,