📄 fpga2pc.hif
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# entity
sld_ela_level_seq_mgr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|fpga2pc.(9).cnf
db|fpga2pc.(9).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
2
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
trigger_in_enabled
1
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|fpga2pc.(10).cnf
db|fpga2pc.(10).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_seg_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|fpga2pc.(11).cnf
db|fpga2pc.(11).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
}
# end
# entity
sld_ela_post_trigger_counter
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|fpga2pc.(12).cnf
db|fpga2pc.(12).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
trigger_level_pipeline
1
PARAMETER_DEC
USR
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1114012448
6
# storage
db|fpga2pc.(13).cnf
db|fpga2pc.(13).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
0
PARAMETER_DEC
USR
LPM_AVALUE
2
PARAMETER_DEC
USR
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_mo8
PARAMETER_UNKNOWN
USR
}
# used_port {
aset
clk_en
clock
q7
q8
q9
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
c:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107573980
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
c:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107572664
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107572680
c:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107572320
c:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107572334
}
# end
# entity
sld_ela_segment_mgr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_ela_control.vhd
1114012238
4
# storage
db|fpga2pc.(15).cnf
db|fpga2pc.(15).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
sample_depth
1024
PARAMETER_DEC
USR
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1114012448
6
# storage
db|fpga2pc.(16).cnf
db|fpga2pc.(16).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
0
PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
OFF
PARAMETER_UNKNOWN
USR
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_e29
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clk_en
clock
cnt_en
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
sclr
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
c:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107573980
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
c:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107572664
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107572680
c:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107572320
c:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107572334
}
# end
# entity
lpm_compare
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_compare.tdf
1114012448
6
# storage
db|fpga2pc.(18).cnf
db|fpga2pc.(18).cnf
# user_parameter {
lpm_width
10
PARAMETER_DEC
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_DEC
USR
CHAIN_SIZE
8
PARAMETER_UNKNOWN
DEF
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aeb
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|comptree.inc
1107573994
c:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
}
# end
# entity
comptree
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|comptree.tdf
1114012448
6
# storage
db|fpga2pc.(19).cnf
db|fpga2pc.(19).cnf
# user_parameter {
lpm_width
10
PARAMETER_UNKNOWN
USR
CHAIN_LENGTH
8
PARAMETER_UNKNOWN
USR
ONE_INPUT_CONSTANT
0
PARAMETER_UNKNOWN
USR
OUTPUTS_CLOCKED
0
PARAMETER_UNKNOWN
USR
BURRIED_CLOCKED
1
PARAMETER_UNKNOWN
USR
MODE
0
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
aeb
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|comptree.inc
1107573994
c:|altera|quartus50|libraries|megafunctions|cmpchain.inc
1107573964
}
# end
# entity
cmpchain
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|cmpchain.tdf
1114012448
6
# storage
db|fpga2pc.(20).cnf
db|fpga2pc.(20).cnf
# user_parameter {
lpm_width
10
PARAMETER_UNKNOWN
USR
ONE_INPUT_CONSTANT
0
PARAMETER_UNKNOWN
USR
MODE
0
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
aeb
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|comptree.inc
1107573994
}
# end
# entity
comptree
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|comptree.tdf
1114012448
6
# storage
db|fpga2pc.(21).cnf
db|fpga2pc.(21).cnf
# user_parameter {
lpm_width
10
PARAMETER_UNKNOWN
USR
CHAIN_LENGTH
1
PARAMETER_UNKNOWN
USR
ONE_INPUT_CONSTANT
0
PARAMETER_UNKNOWN
USR
OUTPUTS_CLOCKED
1
PARAMETER_UNKNOWN
USR
BURRIED_CLOCKED
0
PARAMETER_UNKNOWN
USR
MODE
0
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
aeb
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|comptree.inc
1107573994
c:|altera|quartus50|libraries|megafunctions|cmpchain.inc
1107573964
}
# end
# entity
cmpchain
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|cmpchain.tdf
1114012448
6
# storage
db|fpga2pc.(22).cnf
db|fpga2pc.(22).cnf
# user_parameter {
lpm_width
2
PARAMETER_UNKNOWN
USR
ONE_INPUT_CONSTANT
0
PARAMETER_UNKNOWN
USR
MODE
0
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
dataa0
dataa1
datab0
datab1
aeb
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
c:|altera|quartus50|libraries|megafunctions|comptree.inc
1107573994
}
# end
# entity
comptree
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|comptree.tdf
1114012448
6
# storage
db|fpga2pc.(23).cnf
db|fpga2pc.(23).cnf
# user_parameter {
lpm_width
5
PARAMETER_UNKNOWN
USR
CHAIN_LENGTH
1
PARAMETER_UNKNOWN
USR
ONE_INPUT_CONSTANT
1
PARAMETER_UNKNOWN
USR
OUTPUTS_CLOCKED
1
PARAMETER_UNKNOWN
USR
BURRIED_CLOCKED
0
PARAMETER_UNKNOWN
USR
MODE
0
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
datab0
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