fpga2pc.map.eqn

this is a sample about usb in transmission,it s default installation is D:RedLogicRCII_samples, and

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-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L94Q is fifo_wr~reg0
--operation mode is normal

A1L94Q_lut_out = STATE.WRITE_1;
A1L94Q = DFFEAS(A1L94Q_lut_out, !clkin, rst, , , , , , );


--A1L22Q is fifo_data[0]~reg0
--operation mode is arithmetic

A1L22Q_lut_out = !A1L22Q;
A1L22Q = DFFEAS(A1L22Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L12 is fifo_data[0]~93
--operation mode is arithmetic

A1L12 = CARRY(A1L22Q);


--A1L52Q is fifo_data[1]~reg0
--operation mode is arithmetic

A1L52Q_carry_eqn = A1L12;
A1L52Q_lut_out = A1L52Q $ (A1L52Q_carry_eqn);
A1L52Q = DFFEAS(A1L52Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L42 is fifo_data[1]~97
--operation mode is arithmetic

A1L42 = CARRY(!A1L12 # !A1L52Q);


--A1L82Q is fifo_data[2]~reg0
--operation mode is arithmetic

A1L82Q_carry_eqn = A1L42;
A1L82Q_lut_out = A1L82Q $ (!A1L82Q_carry_eqn);
A1L82Q = DFFEAS(A1L82Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L72 is fifo_data[2]~101
--operation mode is arithmetic

A1L72 = CARRY(A1L82Q & (!A1L42));


--A1L13Q is fifo_data[3]~reg0
--operation mode is arithmetic

A1L13Q_carry_eqn = A1L72;
A1L13Q_lut_out = A1L13Q $ (A1L13Q_carry_eqn);
A1L13Q = DFFEAS(A1L13Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L03 is fifo_data[3]~105
--operation mode is arithmetic

A1L03 = CARRY(!A1L72 # !A1L13Q);


--A1L43Q is fifo_data[4]~reg0
--operation mode is arithmetic

A1L43Q_carry_eqn = A1L03;
A1L43Q_lut_out = A1L43Q $ (!A1L43Q_carry_eqn);
A1L43Q = DFFEAS(A1L43Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L33 is fifo_data[4]~109
--operation mode is arithmetic

A1L33 = CARRY(A1L43Q & (!A1L03));


--A1L73Q is fifo_data[5]~reg0
--operation mode is arithmetic

A1L73Q_carry_eqn = A1L33;
A1L73Q_lut_out = A1L73Q $ (A1L73Q_carry_eqn);
A1L73Q = DFFEAS(A1L73Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L63 is fifo_data[5]~113
--operation mode is arithmetic

A1L63 = CARRY(!A1L33 # !A1L73Q);


--A1L04Q is fifo_data[6]~reg0
--operation mode is arithmetic

A1L04Q_carry_eqn = A1L63;
A1L04Q_lut_out = A1L04Q $ (!A1L04Q_carry_eqn);
A1L04Q = DFFEAS(A1L04Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );

--A1L93 is fifo_data[6]~117
--operation mode is arithmetic

A1L93 = CARRY(A1L04Q & (!A1L63));


--A1L34Q is fifo_data[7]~reg0
--operation mode is normal

A1L34Q_carry_eqn = A1L93;
A1L34Q_lut_out = A1L34Q $ (A1L34Q_carry_eqn);
A1L34Q = DFFEAS(A1L34Q_lut_out, !clkin, VCC, , A1L24, VCC, !rst, , );


--A1L9 is altera_internal_jtag~TDO
A1L9 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !C1_hub_tdo);

--A1L01 is altera_internal_jtag~TMSUTAP
A1L01 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !C1_hub_tdo);

--A1L8 is altera_internal_jtag~TCKUTAP
A1L8 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !C1_hub_tdo);

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !C1_hub_tdo);


--STATE.WRITE_1 is STATE.WRITE_1
--operation mode is normal

STATE.WRITE_1_lut_out = STATE.WRITE_2 # STATE.WRITE_1 & !fifo_full # !STATE.IDLE;
STATE.WRITE_1 = DFFEAS(STATE.WRITE_1_lut_out, !clkin, rst, , , , , , );


--clkin is clkin
--operation mode is normal

clkin_lut_out = !clkin;
clkin = DFFEAS(clkin_lut_out, clk, rst, , , , , , );


--A1L24 is fifo_data[7]~8
--operation mode is normal

A1L24 = STATE.WRITE_1 & fifo_full;


--C1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
--operation mode is normal

C1_hub_tdo = AMPP_FUNCTION(!A1L8, C1L31, C1L51, C1L71, C1L91, !HB1_state[8], HB1L81);


--STATE.WRITE_2 is STATE.WRITE_2
--operation mode is normal

STATE.WRITE_2_lut_out = A1L24;
STATE.WRITE_2 = DFFEAS(STATE.WRITE_2_lut_out, !clkin, rst, , , , , , );


--STATE.IDLE is STATE.IDLE
--operation mode is normal

STATE.IDLE_lut_out = STATE.WRITE_1 # STATE.WRITE_2 # !STATE.IDLE;
STATE.IDLE = DFFEAS(STATE.IDLE_lut_out, !clkin, rst, , , , , , );


--FB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
--operation mode is normal

FB4_Q[0] = AMPP_FUNCTION(A1L8, altera_internal_jtag, !C1L2, C1L02);


--FB1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
--operation mode is normal

FB1_Q[3] = AMPP_FUNCTION(A1L8, FB2_Q[3], FB6_Q[3], FB3_Q[0], !C1L2, C1L22);


--FB1_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
--operation mode is normal

FB1_Q[5] = AMPP_FUNCTION(A1L8, FB2_Q[5], FB6_Q[5], FB3_Q[0], !C1L2, C1L22);


--C1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
--operation mode is normal

C1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L8, K5_dffs[0], K5_dffs[1], C1L43, C1L53, HB1_state[0], HB1_state[12]);


--FB1_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4]
--operation mode is normal

FB1_Q[4] = AMPP_FUNCTION(A1L8, FB2_Q[4], FB6_Q[4], FB3_Q[0], !C1L2, C1L22);


--B1_bypass_reg_out is sld_signaltap:auto_signaltap_0|bypass_reg_out
--operation mode is normal

B1_bypass_reg_out = AMPP_FUNCTION(A1L8, altera_internal_jtag, !B1_reset_all, C1L13);


--C1L21 is sld_hub:sld_hub_inst|hub_tdo~275
--operation mode is normal

C1L21 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, FB1_Q[4], B1_bypass_reg_out);


--C1L31 is sld_hub:sld_hub_inst|hub_tdo~276
--operation mode is normal

C1L31 = AMPP_FUNCTION(FB4_Q[0], FB1_Q[3], FB1_Q[5], C1L21);


--FB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
--operation mode is normal

FB5_Q[0] = AMPP_FUNCTION(A1L8, altera_internal_jtag, VCC, C1L02);


--F2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
--operation mode is normal

F2_WORD_SR[0] = AMPP_FUNCTION(A1L8, F2L32, F2L42, F2_WORD_SR[1], F2_word_counter[0], !F1_clear_signal, HB1_state[4], C1L4);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
--operation mode is normal

C1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L8, C1L01, VCC);


--JB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0]
--operation mode is normal

JB1_dffe1a[0] = AMPP_FUNCTION(A1L8, C1L92, FB6_Q[3], FB6_Q[2], FB6_Q[1], !C1L2, C1L6);


--C1L41 is sld_hub:sld_hub_inst|hub_tdo~277
--operation mode is normal

C1L41 = AMPP_FUNCTION(F2_WORD_SR[0], C1_HUB_BYPASS_REG, JB1_dffe1a[0]);


--C1L51 is sld_hub:sld_hub_inst|hub_tdo~278
--operation mode is normal

C1L51 = AMPP_FUNCTION(FB5_Q[0], C1L41, C1_jtag_debug_mode_usr1);


--K1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
--operation mode is normal

K1_dffs[0] = AMPP_FUNCTION(A1L8, K1_dffs[1], H1_is_buffer_wrapped_once, HB1_state[4], B1L23, !B1_reset_all);


--K3_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
--operation mode is normal

K3_dffs[0] = AMPP_FUNCTION(A1L8, K3_dffs[1], !B1_reset_all, G1_trigger_setup_ena);


--C1L61 is sld_hub:sld_hub_inst|hub_tdo~279
--operation mode is normal

C1L61 = AMPP_FUNCTION(FB1_Q[4], K1_dffs[0], FB1_Q[3], K3_dffs[0]);


--C1L71 is sld_hub:sld_hub_inst|hub_tdo~280
--operation mode is normal

C1L71 = AMPP_FUNCTION(FB4_Q[0], C1_jtag_debug_mode_usr1, C1L61);


--FB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
--operation mode is normal

FB6_Q[0] = AMPP_FUNCTION(A1L8, FB6_Q[1], G1L3, HB1_state[4], !C1L2, FB6L4);


--F1_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
--operation mode is normal

F1_WORD_SR[0] = AMPP_FUNCTION(A1L8, F1_WORD_SR[1], F1L51, HB1_state[4], !F1_clear_signal, B1L03);


--C1L81 is sld_hub:sld_hub_inst|hub_tdo~281
--operation mode is normal

C1L81 = AMPP_FUNCTION(FB4_Q[0], FB1_Q[5], F1_WORD_SR[0]);


--C1L91 is sld_hub:sld_hub_inst|hub_tdo~282
--operation mode is normal

C1L91 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, FB6_Q[0], C1L81);


--HB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
--operation mode is normal

HB1_state[8] = AMPP_FUNCTION(A1L8, HB1_state[7], HB1_state[5], VCC, !A1L01);


--HB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]
--operation mode is normal

HB1_state[4] = AMPP_FUNCTION(A1L8, HB1_state[7], HB1_state[3], HB1_state[4], VCC, A1L01);


--HB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]
--operation mode is normal

HB1_state[3] = AMPP_FUNCTION(A1L8, HB1_state[2], A1L01, VCC);


--HB1L81 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13
--operation mode is normal

HB1L81 = AMPP_FUNCTION(HB1_state[4], HB1_state[3]);


--HB1_state[1] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[1]
--operation mode is normal

HB1_state[1] = AMPP_FUNCTION(A1L8, HB1_state[0], HB1_state[8], HB1_state[1], HB1_state[15], VCC, A1L01);


--FB7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0]
--operation mode is normal