sram.hif

this is a sample about SRAM read/write transmission,it s default installation is D:RedLogicRCII_samp

# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_acquisition_buffer.vhd
1114066240
4
# storage
db|SRAM.(35).cnf
db|SRAM.(35).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
buffer_depth
1024
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
data_bits
40
PARAMETER_DEC
USR
data_bit_cntr_bits
6
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1114066448
6
# storage
db|SRAM.(36).cnf
db|SRAM.(36).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
6
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
40
PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_cv7
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107628164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107628570
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107628408
c:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107627980
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107628500
c:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107628548
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107626664
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107626680
c:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107626320
c:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107626334
}
# end
# entity
cntr_cv7
# case_insensitive
# source_file
db|cntr_cv7.tdf
1119885396
6
# storage
db|SRAM.(37).cnf
db|SRAM.(37).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1114066448
6
# storage
db|SRAM.(38).cnf
db|SRAM.(38).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
1024
PARAMETER_DEC
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_dn7
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107628164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107628570
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107628408
c:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107627980
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107628500
c:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107628548
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107626664
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107626680
c:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107626320
c:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107626334
}
# end
# entity
cntr_dn7
# case_insensitive
# source_file
db|cntr_dn7.tdf
1119885396
6
# storage
db|SRAM.(39).cnf
db|SRAM.(39).cnf
# used_port {
clock
clk_en
aclr
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114066454
6
# storage
db|SRAM.(40).cnf
db|SRAM.(40).cnf
# user_parameter {
LPM_WIDTH
40
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data2
data30
data31
data32
data33
data34
data35
data36
data37
data38
data39
data3
data4
data5
data6
data7
data8
data9
enable
load
shiftin
shiftout
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107628164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114066454
6
# storage
db|SRAM.(41).cnf
db|SRAM.(41).cnf
# user_parameter {
LPM_WIDTH
21
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data2
data3
data4
data5
data6
data7
data8
data9
enable
load
shiftin
shiftout
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107628164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_rom_sr.vhd
1114066236
4
# storage
db|SRAM.(42).cnf
db|SRAM.(42).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
32
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# entity
sld_hub
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1114066238
4
# storage
db|SRAM.(43).cnf
db|SRAM.(43).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
2
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
7
PARAMETER_UNKNOWN
USR
node_info
00011000000000000110111000000000
PARAMETER_BIN
USR
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1114066238
}
# end
# entity
sld_jtag_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1114066238
4
# storage
db|SRAM.(44).cnf
db|SRAM.(44).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1114066238
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114066454
6
# storage
db|SRAM.(45).cnf
db|SRAM.(45).cnf
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
enable
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107628164
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
}
# end
# entity
lpm_decode
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_decode.tdf
1114066450
6
# storage
db|SRAM.(46).cnf
db|SRAM.(46).cnf
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_9ie
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq7
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107628524
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114066420
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107628500
c:|altera|quartus50|libraries|megafunctions|altshift.inc
1107627438
c:|altera|quartus50|libraries|megafunctions|declut.inc
1107628136
}
# end
# entity
decode_9ie
# case_insensitive
# source_file
db|decode_9ie.tdf
1119885400
6
# storage
db|SRAM.(47).cnf
db|SRAM.(47).cnf
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq4
eq5
eq6
eq7
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1114066236
4
# storage
db|SRAM.(48).cnf
db|SRAM.(48).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
1
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1114066236
4
# storage
db|SRAM.(49).cnf
db|SRAM.(49).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
8
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1114066236
4
# storage
db|SRAM.(50).cnf
db|SRAM.(50).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
7
PARAMETER_DEC
USR
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_rom_sr.vhd
1114066236
4
# storage
db|SRAM.(51).cnf
db|SRAM.(51).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
64
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# complete