u-boot-2410-20060703.patch

u-boot for arm linux 2.6.17 的补丁文件

@@ -66,7 +66,7 @@
 		size += nand_info[i].size;
 		if (nand_curr_device == -1)
 			nand_curr_device = i;
-}
+	}
 	printf("%lu MiB\n", size / (1024 * 1024));
 }
 
diff -Naur u-boot-20060523.org/drivers/nand_legacy/nand_legacy.c u-boot/drivers/nand_legacy/nand_legacy.c
--- u-boot-20060523.org/drivers/nand_legacy/nand_legacy.c	2006-05-04 00:08:26.000000000 +0800
+++ u-boot/drivers/nand_legacy/nand_legacy.c	2006-06-16 14:53:10.000000000 +0800
@@ -8,13 +8,12 @@
  * Added 16-bit nand support
  * (C) 2004 Texas Instruments
  */
-
 #include <common.h>
 #include <command.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <watchdog.h>
-
+#include <s3c2410.h>
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # include <status_led.h>
 # define SHOW_BOOT_PROGRESS(arg)	show_boot_progress(arg)
@@ -60,6 +59,98 @@
 #define NANDRW_WRITE	0x00
 #define NANDRW_JFFS2	0x02
 #define NANDRW_JFFS2_SKIP	0x04
+typedef enum {
+	NFCE_LOW,
+	NFCE_HIGH
+} NFCE_STATE;
+
+
+/*static inline void NF_Reset(void)
+{
+	    int i;
+
+	NF_SetCE(NFCE_LOW);
+	NF_Cmd(0xFF); // reset command 
+	for(i = 0; i < 10; i++); // tWB = 100ns. 
+	NF_WaitRB(); // wait 200~500us; 
+	NF_SetCE(NFCE_HIGH);
+}*/
+//hema
+static  void NF_Conf(u16 conf)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    nand->NFCONF = conf;
+}
+
+static  void NF_Cmd(u8 cmd)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    nand->NFCMD = cmd;
+}
+
+static void NF_CmdW(u8 cmd)
+{
+	    NF_Cmd(cmd);
+		    udelay(1);
+}
+
+static  void NF_Addr(u8 addr)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    nand->NFADDR = addr;
+}
+
+static  void NF_SetCE(NFCE_STATE s)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    switch (s) {
+					case NFCE_LOW:
+					nand->NFCONF &= ~(1<<11);
+					break;
+
+					case NFCE_HIGH:
+						nand->NFCONF |= (1<<11);
+						break;
+					}
+}
+
+static void NF_WaitRB(void)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    while (!(nand->NFSTAT & (1<<0)));
+}
+static  void NF_Write(u8 data)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    nand->NFDATA = data;
+}
+
+static  u8 NF_Read(void)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    return(nand->NFDATA);
+}
+
+static  void NF_Init_ECC(void)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    nand->NFCONF |= (1<<12);
+}
+
+static  u32 NF_Read_ECC(void)
+{
+	    S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+		    return(nand->NFECC);
+}
 
 
 /*
@@ -420,7 +511,7 @@
 	for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 		if (mfr == nand_flash_ids[i].manufacture_id &&
 		    id == nand_flash_ids[i].model_id) {
-#ifdef NAND_DEBUG
+#ifdef NAND_DEBUG	
 			printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 			       "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 			       nand_flash_ids[i].name);
@@ -452,11 +543,9 @@
 	}
 
 
-#ifdef NAND_DEBUG
 	/* We haven't fully identified the chip. Print as much as we know. */
 	printf("Unknown flash chip found: %2.2X %2.2X\n",
 	       id, mfr);
-#endif
 
 	return 0;
 }
@@ -1376,7 +1465,6 @@
 	}
 	if (!nand)
 		return (0);
-
 	memset((char *)nand, 0, sizeof(struct nand_chip));
 
 	nand->IO_ADDR = physadr;
diff -Naur u-boot-20060523.org/include/configs/smdk2410.h u-boot/include/configs/smdk2410.h
--- u-boot-20060523.org/include/configs/smdk2410.h	2006-06-16 13:27:56.000000000 +0800
+++ u-boot/include/configs/smdk2410.h	2006-06-27 10:53:29.000000000 +0800
@@ -47,14 +47,17 @@
 /*
  * Size of malloc() pool
  */
+/*#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE	128	// size in bytes reserved for initial data 
+*/
 #define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
-#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-
+#define CFG_GBL_DATA_SIZE	128	// size in bytes reserved for initial data 
 /*
  * Hardware drivers
  */
 #define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
 #define CS8900_BASE		0x19000300
+
 #define CS8900_BUS16		1 /* the Linux driver does accesses as shorts */
 
 /*
@@ -78,7 +81,11 @@
 #define CONFIG_COMMANDS \
 			(CONFIG_CMD_DFL	 | \
 			CFG_CMD_CACHE	 | \
-			/*CFG_CMD_NAND	 |*/ \
+			CFG_CMD_NET	 | \
+			CFG_CMD_ENV	 | \
+			CFG_CMD_FLASH	 | \
+			CFG_CMD_PING	 | \
+			CFG_CMD_NAND	 | \
 			/*CFG_CMD_EEPROM |*/ \
 			/*CFG_CMD_I2C	 |*/ \
 			/*CFG_CMD_USB	 |*/ \
@@ -90,12 +97,14 @@
 #include <cmd_confdefs.h>
 
 #define CONFIG_BOOTDELAY	3
-/*#define CONFIG_BOOTARGS    	"root=ramfs devfs=mount console=ttySA0,9600" */
-/*#define CONFIG_ETHADDR	08:00:3e:26:0a:5b */
+//#define CONFIG_BOOTARGS    	"root=ramfs devfs=mount console=ttySA0,9600" 
+//#define CONFIG_BOOTARGS    	"noinitrd root=/dev/mtdblock/2 init=/linuxrc console=ttyS0"
+#define CONFIG_ETHADDR	08:00:3e:26:0a:5b 
 #define CONFIG_NETMASK          255.255.255.0
-#define CONFIG_IPADDR		10.0.0.110
-#define CONFIG_SERVERIP		10.0.0.1
-/*#define CONFIG_BOOTFILE	"elinos-lart" */
+#define CONFIG_IPADDR		10.1.10.100
+#define CONFIG_SERVERIP		10.1.10.50
+#define CONFIG_BOOTFILE	"image.bin"
+#define CONFIG_CMDLINE_TAG
 /*#define CONFIG_BOOTCOMMAND	"tftp; bootm" */
 
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -119,7 +128,7 @@
 
 #undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */
 
-#define	CFG_LOAD_ADDR		0x33000000	/* default load address	*/
+#define	CFG_LOAD_ADDR		0x30008000	/* default load address	*/
 
 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 /* it to wrap 100 times (total 1562500) to get 1 sec. */
@@ -157,7 +166,6 @@
 //#define CONFIG_AMD_LV400	1	/* uncomment this if you have a LV400 flash */
 #define CONFIG_AMD_LV800	1	/* uncomment this if you have a LV800 flash */
 
-
 #define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
 #ifdef CONFIG_AMD_LV800
 #define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
@@ -174,7 +182,82 @@
 #define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */
 
-#define	CFG_ENV_IS_IN_FLASH	1
+//#define	CFG_ENV_IS_IN_FLASH	1
+#define	CFG_ENV_IS_IN_NAND	1
+#define CFG_ENV_OFFSET		0x0F0000 
+//#define ENV_IS_EMBEDDED 1			
+			
+
+#define CFG_NAND_BASE    0x4E000000
+#define CMD_SAVEENV
+#define CFG_NAND_LEGACY			
 #define CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
 
+/*set env*/
+#define CFG_MONITOR_BASE PHYS_SDRAM_1
+
+
+//----------------------------------------------------------------------- 
+  // NAND flash settings 
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) 
+#define CFG_MAX_NAND_DEVICE 1 // Max number of NAND devices 
+#define SECTORSIZE 512 
+
+#define ADDR_COLUMN 1 
+#define ADDR_PAGE 2 
+#define ADDR_COLUMN_PAGE 3 
+
+#define NAND_ChipID_UNKNOWN 0x00 
+#define NAND_MAX_FLOORS 1 
+#define NAND_MAX_CHIPS 1 
+
+#define NAND_WAIT_READY(nand) NF_WaitRB() 
+
+#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) 
+#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) 
+
+
+#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) 
+#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) 
+#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) 
+#define WRITE_NAND(d, adr) NF_Write(d) 
+#define READ_NAND(adr) NF_Read() 
+			// the following functions are NOP's because S3C24X0 handles this in hardware 
+#define NAND_CTL_CLRALE(nandptr) 
+#define NAND_CTL_SETALE(nandptr) 
+#define NAND_CTL_CLRCLE(nandptr) 
+#define NAND_CTL_SETCLE(nandptr) 
+
+#define CONFIG_MTD_NAND_VERIFY_WRITE 1 
+#define CONFIG_MTD_NAND_ECC_JFFS2 1 
+
+#endif // CONFIG_COMMANDS & CFG_CMD_NAND  
+			
+
+
+
+
+/*
+ * Nandflash Boot
+ */
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND) 
+#define CONFIG_S3C2410_NAND_BOOT 1
+#define STACK_BASE    0x33f00000
+#define STACK_SIZE    0x8000
+#define UBOOT_RAM_BASE    0x33f80000
+// NAND Flash Controller
+#define NAND_CTL_BASE            0x4E000000
+#define bINT_CTL(Nb)        __REG(INT_CTL_BASE + (Nb))
+// Offset
+#define oNFCONF               0x00
+#define oNFCMD                0x04
+#define oNFADDR               0x08
+#define oNFDATA               0x0c
+#define oNFSTAT               0x10
+#define oNFECC                0x14
+
+
+#endif			
 #endif	/* __CONFIG_H */
diff -Naur u-boot-20060523.org/lib_arm/board.c u-boot/lib_arm/board.c
--- u-boot-20060523.org/lib_arm/board.c	2006-05-04 00:14:25.000000000 +0800
+++ u-boot/lib_arm/board.c	2006-06-15 16:31:27.000000000 +0800
@@ -45,6 +45,8 @@
 #include <version.h>
 #include <net.h>
 
+#include <s3c2410.h>
+
 #ifdef CONFIG_DRIVER_SMC91111
 #include "../drivers/smc91111.h"
 #endif
@@ -56,6 +58,7 @@
 
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
 void nand_init (void);
+
 #endif
 
 ulong monitor_flash_len;
@@ -123,10 +126,14 @@
 {
 	char tmp[64];	/* long enough for environment variables */
 	int i = getenv_r ("baudrate", tmp, sizeof (tmp));
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();//hema
+
+	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x3) & 0xf)<<4);
 	gd->bd->bi_baudrate = gd->baudrate = (i > 0)
 			? (int) simple_strtoul (tmp, NULL, 10)
 			: CONFIG_BAUDRATE;
 
+	
 	return (0);
 }
 
@@ -236,6 +243,7 @@
 void start_armboot (void)
 {
 	init_fnc_t **init_fnc_ptr;
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();//hema
 	char *s;
 #ifndef CFG_NO_FLASH
 	ulong size;
@@ -255,8 +263,10 @@
 
 	monitor_flash_len = _bss_start - _armboot_start;
 
+	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x0) & 0xf)<<4);
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		if ((*init_fnc_ptr)() != 0) {
+			gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0xf) & 0xf)<<4);
 			hang ();
 		}
 	}
@@ -295,20 +305,20 @@
 
 	/* armboot_start is defined in the board-specific linker script */
 	mem_malloc_init (_armboot_start - CFG_MALLOC_LEN);
+	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x6) & 0xf)<<4);
 
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
 	puts ("NAND:  ");
 	nand_init();		/* go init the NAND */
 #endif
-
+	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x9) & 0xf)<<4);
 #ifdef CONFIG_HAS_DATAFLASH
 	AT91F_DataflashInit();
 	dataflash_print_info();
 #endif
-
 	/* initialize environment */
 	env_relocate ();
-
+	puts("\n");
 #ifdef CONFIG_VFD
 	/* must do this after the framebuffer is allocated */
 	drv_vfd_init();
@@ -394,6 +404,7 @@
 	eth_initialize(gd->bd);
 #endif
 	/* main_loop() can return to retry autoboot, if so just run it again. */
+	gpio->GPFDAT = (gpio->GPFDAT & ~(0xf<<4))|((~(0x9) & 0xf)<<4);
 	for (;;) {
 		main_loop ();
 	}