📄 f326_usb0_interruptserviceroutine.lst
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206 3 // SETUP packet words to Big Endian so
207 3 // they can be compared to other 16-bit
208 3 // values elsewhere properly
209 3 SETUP.wValue.i = SETUP.wValue.c[MSB] + 256*SETUP.wValue.c[LSB];
210 3 SETUP.wIndex.i = SETUP.wIndex.c[MSB] + 256*SETUP.wIndex.c[LSB];
211 3 SETUP.wLength.i = SETUP.wLength.c[MSB] + 256*SETUP.wLength.c[LSB];
212 3
213 3 // Intercept HID class-specific requests
214 3 if( (SETUP.bmRequestType & ~0x80) == DSC_HID) {
215 4 switch (SETUP.bRequest) {
216 5 case GET_REPORT:
217 5 Get_Report ();
218 5 break;
219 5 case SET_REPORT:
220 5 Set_Report ();
221 5 break;
222 5 case GET_IDLE:
223 5 Get_Idle ();
224 5 break;
225 5 case SET_IDLE:
226 5 Set_Idle ();
227 5 break;
228 5 case GET_PROTOCOL:
229 5 Get_Protocol ();
230 5 break;
231 5 case SET_PROTOCOL:
232 5 Set_Protocol ();
233 5 break;
234 5 default:
235 5 Force_Stall (); // Send stall to host if invalid
236 5 break; // request
237 5 }
238 4 } else
239 3
240 3 switch (SETUP.bRequest) // Call correct subroutine to handle
241 3 { // each kind of standard request
C51 COMPILER V7.50 F326_USB0_INTERRUPTSERVICEROUTINE 12/29/2007 16:03:22 PAGE 5
242 4 case GET_STATUS:
243 4 Get_Status ();
244 4 break;
245 4 case CLEAR_FEATURE:
246 4 Clear_Feature ();
247 4 break;
248 4 case SET_FEATURE:
249 4 Set_Feature ();
250 4 break;
251 4 case SET_ADDRESS:
252 4 Set_Address ();
253 4 break;
254 4 case GET_DESCRIPTOR:
255 4 Get_Descriptor ();
256 4 break;
257 4 case GET_CONFIGURATION:
258 4 Get_Configuration ();
259 4 break;
260 4 case SET_CONFIGURATION:
261 4 Set_Configuration ();
262 4 break;
263 4 case GET_INTERFACE:
264 4 Get_Interface ();
265 4 break;
266 4 case SET_INTERFACE:
267 4 Set_Interface ();
268 4 break;
269 4 default:
270 4 Force_Stall (); // Send stall to host if invalid request
271 4 break;
272 4 }
273 3 }
274 2 }
275 1
276 1 if (EP_STATUS[0] == EP_TX) // See if endpoint should transmit
277 1 {
278 2 if (!(ControlReg & rbINPRDY) ) // Don't overwrite last packet
279 2 {
280 3 // Read control register
281 3 POLL_READ_BYTE (E0CSR, ControlReg);
282 3
283 3 // Check to see if SETUP End or Out Packet received, if so do not put
284 3 // any new data on FIFO
285 3 if ((!(ControlReg & rbSUEND)) || (!(ControlReg & rbOPRDY)))
286 3 {
287 4 // Add In Packet ready flag to E0CSR bitmask
288 4 ControlReg = rbINPRDY;
289 4 if (DATASIZE >= EP0_PACKET_SIZE)
290 4 {
291 5 // Break Data into multiple packets if larger than Max Packet
292 5 Fifo_Write_InterruptServiceRoutine (FIFO_EP0, EP0_PACKET_SIZE,
293 5 (unsigned char*)DATAPTR);
294 5 // Advance data pointer
295 5 DATAPTR += EP0_PACKET_SIZE;
296 5 // Decrement data size
297 5 DATASIZE -= EP0_PACKET_SIZE;
298 5 // Increment data sent counter
299 5 DATASENT += EP0_PACKET_SIZE;
300 5 }
301 4 else
302 4 {
303 5 // If data is less than Max Packet size or zero
C51 COMPILER V7.50 F326_USB0_INTERRUPTSERVICEROUTINE 12/29/2007 16:03:22 PAGE 6
304 5 Fifo_Write_InterruptServiceRoutine (FIFO_EP0, DATASIZE,
305 5 (unsigned char*)DATAPTR);
306 5 ControlReg |= rbDATAEND;// Add Data End bit to bitmask
307 5 EP_STATUS[0] = EP_IDLE; // Return EP 0 to idle state
308 5 }
309 4 if (DATASENT == SETUP.wLength.i)
310 4 {
311 5 // This case exists when the host requests an even multiple of
312 5 // your endpoint zero max packet size, and you need to exit
313 5 // transmit mode without sending a zero length packet
314 5 ControlReg |= rbDATAEND;// Add Data End bit to mask
315 5 EP_STATUS[0] = EP_IDLE; // Return EP 0 to idle state
316 5 }
317 4 // Write mask to E0CSR
318 4 POLL_WRITE_BYTE(E0CSR, ControlReg);
319 4 }
320 3 }
321 2 }
322 1
323 1 if (EP_STATUS[0] == EP_RX) // See if endpoint should transmit
324 1 {
325 2 // Read control register
326 2 POLL_READ_BYTE (E0CSR, ControlReg);
327 2 if (ControlReg & rbOPRDY) // Verify packet was received
328 2 {
329 3 ControlReg = rbSOPRDY;
330 3 if (DATASIZE >= EP0_PACKET_SIZE)
331 3 {
332 4 Fifo_Read(FIFO_EP0, EP0_PACKET_SIZE, (unsigned char*)DATAPTR);
333 4 // Advance data pointer
334 4 DATAPTR += EP0_PACKET_SIZE;
335 4 // Decrement data size
336 4 DATASIZE -= EP0_PACKET_SIZE;
337 4 // Increment data sent counter
338 4 DATASENT += EP0_PACKET_SIZE;
339 4 }
340 3 else
341 3 {
342 4 // read bytes from FIFO
343 4 Fifo_Read (FIFO_EP0, DATASIZE, (unsigned char*) DATAPTR);
344 4
345 4 ControlReg |= rbDATAEND; // signal end of data
346 4 EP_STATUS[0] = EP_IDLE; // set Endpoint to IDLE
347 4 }
348 3 if (DATASENT == SETUP.wLength.i)
349 3 {
350 4 ControlReg |= rbDATAEND;
351 4 EP_STATUS[0] = EP_IDLE;
352 4 }
353 3 // if EP_RX mode was entered through a SET_REPORT request,
354 3 // call the ReportHandler_OUT function and pass the Report
355 3 // ID, which is the first by the of DATAPTR's buffer
356 3 if ( (EP_STATUS[0] == EP_IDLE) && (SETUP.bRequest == SET_REPORT) )
357 3 {
358 4 ReportHandler_OUT (*DATAPTR);
359 4 }
360 3
361 3 if (EP_STATUS[0] != EP_STALL) POLL_WRITE_BYTE (E0CSR, ControlReg);
362 3 }
363 2 }
364 1
365 1 }
C51 COMPILER V7.50 F326_USB0_INTERRUPTSERVICEROUTINE 12/29/2007 16:03:22 PAGE 7
366
367 //-----------------------------------------------------------------------------
368 // Handle_In1
369 //-----------------------------------------------------------------------------
370 //
371 // Handler will be entered after the endpoint's buffer has been
372 // transmitted to the host. In1_StateMachine is set to Idle, which
373 // signals the foreground routine SendPacket that the Endpoint
374 // is ready to transmit another packet.
375 //-----------------------------------------------------------------------------
376 void Handle_In1 ()
377 {
378 1 EP_STATUS[1] = EP_IDLE;
379 1 }
380
381 //-----------------------------------------------------------------------------
382 // Handle_Out1
383 //-----------------------------------------------------------------------------
384 // Take the received packet from the host off the fifo and put it into
385 // the Out_Packet array.
386 //
387 //-----------------------------------------------------------------------------
388 void Handle_Out1 ()
389 {
390 1
391 1 unsigned char Count = 0;
392 1 unsigned char ControlReg;
393 1
394 1 POLL_WRITE_BYTE (INDEX, 1); // Set index to endpoint 2 registers
395 1 POLL_READ_BYTE (EOUTCSR1, ControlReg);
396 1
397 1 if (EP_STATUS[1] == EP_HALT) // If endpoint is halted, send a stall
398 1 {
399 2 POLL_WRITE_BYTE (EOUTCSR1, rbOutSDSTL);
400 2 }
401 1
402 1 else // Otherwise read received packet
403 1 // from host
404 1 {
405 2 if (ControlReg & rbOutSTSTL) // Clear sent stall bit if last
406 2 // packet was a stall
407 2 {
408 3 POLL_WRITE_BYTE (EOUTCSR1, rbOutCLRDT);
409 3 }
410 2
411 2 Setup_OUT_BUFFER (); // configure buffer to save
412 2 // received data
413 2 Fifo_Read(FIFO_EP1, OUT_BUFFER.Length, OUT_BUFFER.Ptr);
414 2
415 2 // process data according to received Report ID.
416 2 // In systems with Report Descriptors that do not define report IDs,
417 2 // the host will still format OUT packets with a prefix byte
418 2 // of '0x00'.
419 2
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