rominit.s

powerpc 系列cpu mpc860ads vxworks BSP 得花钱买的

        /* initialize r2 and r13 according to EABI standard */
#if	FALSE					/* SDA Not supported yet */

	lis	r2, HIADJ(_SDA2_BASE_)
	addi	r2, r2, LO(_SDA2_BASE_)

	lis	r13, HIADJ(_SDA_BASE_)
	addi	r13, r13, LO(_SDA_BASE_)
#endif

	/* go to C entry point */

	addi	sp, sp, -FRAMEBASESZ		/* get frame stack */

	/* 
	 * calculate C entry point: routine - entry point + ROM base 
	 * routine	= romStart
	 * entry point	= romInit	= R7
	 * ROM base	= ROM_TEXT_ADRS = R8
	 * C entry point: romStart - R7 + R8 
	 */

        lis	r6, HIADJ(romStart)	
        addi	r6, r6, LO(romStart)	/* load R6 with C entry point */

	sub	r6, r6, r7		/* routine - entry point */
	add	r6, r6, r8 		/* + ROM base */

	mtlr	r6			/* move C entry point to LR */
	blr				/* jump to the C entry point */
FUNC_END(_romInit)
FUNC_END(romInit)



#if	(SPLL_FREQ != FREQ_25_MHZ)
/* UPM initialization table, 60ns, 50MHz */

UpmTable60:
# 
# /* DRAM 60ns - single read. (offset 0 in upm RAM) */
        .long	0x8fffec24, 0x0fffec04, 0x0cffec04, 0x00ffec04
	.long	0x00ffec00, 0x37ffec47
# /* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff
# /* DRAM 60ns - burst read. (offset 8 in upm RAM) */
        .long	0x8fffec24, 0x0fffec04, 0x08ffec04, 0x00ffec0c
        .long	0x03ffec00, 0x00ffec44, 0x00ffcc08, 0x0cffcc44
        .long	0x00ffec0c, 0x03ffec00, 0x00ffec44, 0x00ffcc00
        .long	0x3fffc847
# /* offsets 15-17 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff 
# /* DRAM 60ns - single write. (offset 18 in upm RAM) */
        .long	0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47
# /* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - burst write. (offset 20 in upm RAM) */
        .long	0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x33bfcc4f
# /* offsets 2a-2f not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - refresh. (offset 30 in upm RAM) */
        .long	0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06
        .long	0xffffcc85, 0xffffcc05
# /* offsets 36-3b not used */
	.long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTable60End:

/* UPM initialization table, 70ns, 50MHz */

UpmTable70:
# 
# /* DRAM 70ns - single read. (offset 0 in upm RAM) */
        .long	0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04
        .long	0x00ffcc00, 0x37ffcc47
# /* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff
# /* DRAM 70ns - burst read. (offset 8 in upm RAM) */
        .long	0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04
        .long	0x00ffcc08, 0x0cffcc44, 0x00ffec0c, 0x03ffec00
        .long	0x00ffec44, 0x00ffcc08, 0x0cffcc44, 0x00ffec04
        .long	0x00ffec00, 0x3fffec47 
# /* offsets 16-17 not used */
        .long	0xffffffff, 0xffffffff
# /* DRAM 70ns - single write. (offset 18 in upm RAM) */
        .long	0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47
# /* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - burst write. (offset 20 in upm RAM) */
        .long	0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x33bfcc4f
# /* offsets 2a-2f not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - refresh. (offset 30 in upm RAM) */
        .long	0xe0ffcc84, 0x00ffcc04, 0x00ffcc04,  0x0fffcc04
        .long	0x7fffcc06, 0xffffcc85, 0xffffcc05
# /* offsets 37-3b not used */
	.long	0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTable70End:

/* UPM initialization table, EDO, 60ns, 50MHz */

UpmTableEdo60:
# 
# /* DRAM 60ns - single read. (offset 0 in upm RAM) */
        .long	0x8ffbec24, 0x0ff3ec04, 0x0cf3ec04, 0x00f3ec04
	.long	0x00f3ec00, 0x37f7ec47
# /* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff
# /* DRAM 60ns - burst read. (offset 8 in upm RAM) */
        .long	0x8fffec24, 0x0ffbec04, 0x0cf3ec04, 0x00f3ec0c
        .long	0x0cf3ec00, 0x00f3ec4c, 0x0cf3ec00, 0x00f3ec4c
        .long	0x0cf3ec00, 0x00f3ec44, 0x03f3ec00, 0x3ff7ec47
# /* offsets 14-17 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff 
# /* DRAM 60ns - single write. (offset 18 in upm RAM) */
        .long	0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47
# /* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - burst write. (offset 20 in upm RAM) */
        .long	0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x33bfcc4f
# /* offsets 2a-2f not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - refresh. (offset 30 in upm RAM) */
        .long	0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06
        .long	0xffffcc85, 0xffffcc05
# /* offsets 36-3b not used */
	.long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTableEdo60End:

/* UPM initialization table, EDO, 70ns, 50MHz */

UpmTableEdo70:
# 
# /* DRAM 70ns - single read. (offset 0 in upm RAM) */
        .long	0x8ffbcc24, 0x0ff3cc04, 0x0cf3cc04, 0x00f3cc04
        .long	0x00f3cc00, 0x37f7cc47
# /* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff
# /* DRAM 70ns - burst read. (offset 8 in upm RAM) */
        .long	0x8fffcc24, 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc0c
        .long	0x03f3cc00, 0x00f3cc44, 0x00f3ec0c, 0x0cf3ec00
        .long	0x00f3ec4c, 0x03f3ec00, 0x00f3ec44, 0x00f3cc00
        .long	0x33f7cc47 
# /* offsets 15-17 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - single write. (offset 18 in upm RAM) */
        .long	0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47
# /* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - burst write. (offset 20 in upm RAM) */
        .long	0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c
        .long	0x0cafcc00, 0x33bfcc47
# /* offsets 2a-2f not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - refresh. (offset 30 in upm RAM) */
        .long	0xe0ffcc84, 0x00ffcc04, 0x00ffcc04,  0x0fffcc04
        .long	0x7fffcc04, 0xffffcc86, 0xffffcc05
# /* offsets 37-3b not used */
	.long	0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTableEdo70End:

 
#else	/* (SPLL_FREQ != FREQ_25_MHZ) */

/* UPM initialization table, 60ns, 25MHz */

UpmTable60:
# 
# /* DRAM 60ns - single read. (offset 0 in upm RAM) */
        .long	0x0fffcc04, 0x08ffcc00, 0x33ffcc47
# /* offsets 3-7 not used */
        .long	0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - burst read. (offset 8 in upm RAM) */
        .long	0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c
        .long	0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c
        .long	0x08ffcc00, 0x33ffcc47
# /* offsets 11-17 not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - single write. (offset 18 in upm RAM) */
        .long	0x0fafcc04, 0x08afcc00, 0x3fbfcc47
# /* offsets 1b-1f not used */
        .long	0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - burst write. (offset 20 in upm RAM) */
        .long	0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00
        .long	0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00
        .long	0x31bfcc43
# /* offsets 29-2f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - refresh. (offset 30 in upm RAM) */
        .long	0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05
# /* offsets 34-3b not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 60ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTable60End:

/* UPM initialization table, 70ns, 25MHz */

UpmTable70:
# 
# /* DRAM 70ns - single read. (offset 0 in upm RAM) */
        .long	0x0fffec04, 0x08ffec04, 0x00ffec00, 0x3fffcc47
# /* offsets 4-7 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - burst read. (offset 8 in upm RAM) */
        .long	0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c
        .long	0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c
        .long	0x08ffcc00, 0x33ffcc47
# /* offsets 12-17 not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - single write. (offset 18 in upm RAM) */
        .long	0x0fafcc04, 0x08afcc00, 0x3fbfcc47
# /* offsets 1b-1f not used */
        .long	0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - burst write. (offset 20 in upm RAM) */
        .long	0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00
        .long	0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00
        .long	0x31bfcc43
# /* offsets 29-2f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - refresh. (offset 30 in upm RAM) */
        .long	0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05
# /* offsets 34-3b not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
# /* DRAM 70ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
# /* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTable70End:

/* UPM initialization table, 60ns EDO DRAMs, 25MHz */

UpmTableEdo60:
/* DRAM 60ns - single read. (offset 0 in upm RAM) */
        .long	0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47
/* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 60ns - burst read. (offset 8 in upm RAM) */
        .long	0x0ffbcc04, 0x09f3cc0c, 0x09f3cc0c, 0x09f3cc0c
        .long	0x08f3cc00, 0x3ff7cc47
/* offsets 0e-17 not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 60ns - single write. (offset 18 in upm RAM) */
        .long	0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47
/* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 60ns - burst write. (offset 20 in upm RAM) */
        .long	0x0fefcc04, 0x08afcc00, 0x07afcc48, 0x08afcc48
        .long	0x08afcc48, 0x39bfcc47
/* offsets 26-2f not used */
        .long	0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 60ns - refresh. (offset 30 in upm RAM) */
        .long	0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05
/* offsets 34-3b not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 60ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
/* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTableEdo60End:

/* UPM initialization table, EDO, 70ns DRAM, 25MHz */

UpmTableEdo70:
/* DRAM 70ns - single read. (offset 0 in upm RAM) */
        .long	0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47
/* offsets 6-7 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 70ns - burst read. (offset 8 in upm RAM) */
        .long	0x0ffbec04, 0x08f3ec04, 0x03f3ec48, 0x08f3cc00
        .long	0x0ff3cc4c, 0x08f3cc00, 0x0ff3cc4c, 0x08f3cc00
	.long	0x3ff7cc47
/* offsets 11-17 not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 70ns - single write. (offset 18 in upm RAM) */
        .long	0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47
/* offsets 1c-1f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 70ns - burst write. (offset 20 in upm RAM) */
        .long	0x0fefcc04, 0x08afcc00, 0x07afcc4c, 0x08afcc00
        .long	0x07afcc4c, 0x08afcc00, 0x07afcc4c, 0x08afcc00
	.long	0x37bfcc47
/* offsets 29-2f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 70ns - refresh. (offset 30 in upm RAM) */
        .long	0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05
/* offsets 34-3b not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
        .long	0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
/* DRAM 70ns - exception. (offset 3c in upm RAM) */
        .long	0x33ffcc07
/* offset 3d-3f not used */
        .long	0xffffffff, 0xffffffff, 0xffffffff
UpmTableEdo70End:

#endif /* (SPLL_FREQ != FREQ_25_MHZ) */

/* This 50 MHz SDRAM table is for...
 *   860EN Rev B.1 9829 and newer silicon
 *   860T  Rev B.3 9832 and newer silicon
 *
 * This table will NOT work with older 860EN or 860T parts.
 */
 
upmbTableSdram:
 
/* single read   (offset 0x00 in upm ram) */
       .long   0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00
       .long   0x1ff77c47, 0x1ff77c35, 0xefeabc34, 0x1fb57c35
/* burst read    (offset 0x08 in upm ram) */
       .long   0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00
       .long   0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
/* single write  (offset 0x18 in upm ram) */
       .long   0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
/* burst write   (offset 0x20 in upm ram) */
       .long   0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00
       .long   0xf0affc00, 0xe1bbbc04, 0x1ff77c47, 0xfffffc04
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
/* refresh       (offset 0x30 in upm ram) */
       .long   0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04
       .long   0xfffffc84, 0xfffffc07, 0xfffffc04, 0xfffffc04
       .long   0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04
/* exception     (offset 0x3C in upm ram) */
       .long   0x7ffffc07, 0xfffffc04, 0xfffffc04, 0xfffffc04
 
upmbTableSdramEnd: