at91sam9260_sdram.mac

9260的ucos源码

    __writeMemory32(0x00000801,0xFFFFFC20,"Memory");            //* pPmc->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x8 <<8) | AT91C_CKGR_MOSCEN ));
    __sleep(10000);
    __writeMemory32(0x00000001,0xFFFFFC30,"Memory");            // AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
    __sleep(10000);
                                                                //*   AT91C_BASE_CKGR->CKGR_PLLAR = (AT91C_CKGR_SRCA | ((172 << 16) & AT91C_CKGR_MULA) |
                                                                //    (AT91C_CKGR_PLLACOUNT | (AT91C_CKGR_OUTA_2 | (16);
    __writeMemory32(0x20ACBF10,0xFFFFFC28,"Memory");
    __sleep(10000);
    __writeMemory32(0x00000102,0xFFFFFC30,"Memory");            //*   AT91C_BASE_PMC->PMC_MCKR =  AT91C_PMC_CSS_PLLA_CLK | AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;;
    __sleep(10000);
}

/*********************************************************************
*
*       _Watchdog()
*
* Function description
*   Clear Watchdog
**********************************************************************/

Watchdog()
{
                                                                // Watchdog Disable
   __writeMemory32(0x00008000,0xFFFFFD44,"Memory");             //      AT91C_BASE_WDTC->WDTC_WDMR= AT91C_SYSC_WDDIS;

   __message "------------------------------- Watchdog Disable ------------------------------------";
}

/*********************************************************************
*
*       CheckRemap()
*
* Function description
*   Check the Remap.
*********************************************************************/

CheckNoRemap()
{
                                                                // AT91C_MATRIX_MRCR ((AT91_REG *) 	0xFFFFEF00) // (MATRIX)  Master Remp Control Register
    __mac_i=__readMemory32(0xFFFFEF00,"Memory");
    __message "----- AT91C_MATRIX_MRCR  : 0x",__mac_i:%X;

    if ( ((__mac_i & 0x01) == 0) || ((__mac_i & 0x02) == 0)){
        __message "------------------------------- The Remap is NOT & REMAP ----------------------------";
        __writeMemory32(0x00000003,0xFFFFEF00,"Memory");
        __mac_i=__readMemory32(0xFFFFEF00,"Memory");
        __message "----- AT91C_MATRIX_MRCR  : 0x",__mac_i:%X;
    } else {
        __message "------------------------------- The Remap is done -----------------------------------";
    }
}

/*********************************************************************
*
*       __AIC()
*
* Function description
*   Reset the Interrupt Controller.
*********************************************************************/

__AIC()
{

    __writeMemory32(0xffffffff,0xFFFFF124,"Memory");            // Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
    __writeMemory32(0xffffffff,0xFFFFF128,"Memory");

                                                                // #define AT91C_TC0_SR    ((AT91_REG *) 	0xFFFA0020) // (TC0) Status Register
                                                                // #define AT91C_TC1_SR    ((AT91_REG *) 	0xFFFA0060) // (TC1) Status Register
                                                                // #define AT91C_TC2_SR    ((AT91_REG *) 	0xFFFA00A0) // (TC2) Status Register
    __readMemory32(0xFFFA0020,"Memory");
    __readMemory32(0xFFFA0060,"Memory");
    __readMemory32(0xFFFA00A0,"Memory");

    __writeMemory32(0xffffffff,0xFFFFFC14,"Memory");            // disable peripheral clock  Peripheral Clock Disable Register

    for (__mac_i=0;__mac_i < 8; __mac_i++) {
        __mac_pt =  __readMemory32(0xFFFFF130,"Memory");        // AT91C_BASE_AIC->AIC_EOICR
    }
     __message "------------------------------- AIC 2 INIT ---------------------------------------------";
}

/*********************************************************************
*
*       ini() :
* Function description
* Write ARM9 core regsiter to Reset value
**********************************************************************/

ini()
{
    __writeMemory32(0x0,0x00,"Register");
    __writeMemory32(0x0,0x04,"Register");
    __writeMemory32(0x0,0x08,"Register");
    __writeMemory32(0x0,0x0C,"Register");
    __writeMemory32(0x0,0x10,"Register");
    __writeMemory32(0x0,0x14,"Register");
    __writeMemory32(0x0,0x18,"Register");
    __writeMemory32(0x0,0x1C,"Register");
    __writeMemory32(0x0,0x20,"Register");
    __writeMemory32(0x0,0x24,"Register");
    __writeMemory32(0x0,0x28,"Register");
    __writeMemory32(0x0,0x2C,"Register");
    __writeMemory32(0x0,0x30,"Register");
    __writeMemory32(0x0,0x34,"Register");
    __writeMemory32(0x0,0x38,"Register");


    __writeMemory32(0x0D3,0x98,"Register");                     // Set CPSR
}

/*********************************************************************
*
*       __Core_Register() :
* Function description
* Read all ARM9 core regsiter
**********************************************************************/

__Core_Register()
{
    i=__readMemory32(0x00,"Register");   __message "R00 0x",i:%X;
    i=__readMemory32(0x04,"Register");   __message "R01 0x",i:%X;
    i=__readMemory32(0x08,"Register");   __message "R02 0x",i:%X;
    i=__readMemory32(0x0C,"Register");   __message "R03 0x",i:%X;
    i=__readMemory32(0x10,"Register");   __message "R04 0x",i:%X;
    i=__readMemory32(0x14,"Register");   __message "R05 0x",i:%X;
    i=__readMemory32(0x18,"Register");   __message "R06 0x",i:%X;
    i=__readMemory32(0x1C,"Register");   __message "R07 0x",i:%X;
    i=__readMemory32(0x20,"Register");   __message "R08 0x",i:%X;
    i=__readMemory32(0x24,"Register");   __message "R09 0x",i:%X;
    i=__readMemory32(0x28,"Register");   __message "R10 0x",i:%X;
    i=__readMemory32(0x2C,"Register");   __message "R11 0x",i:%X;
    i=__readMemory32(0x30,"Register");   __message "R12 0x",i:%X;
    i=__readMemory32(0x34,"Register");   __message "R13 0x",i:%X;
    i=__readMemory32(0x38,"Register");   __message "R14 0x",i:%X;
    i=__readMemory32(0x3C,"Register");   __message "R13 SVC 0x",i:%X;
    i=__readMemory32(0x40,"Register");   __message "R14 SVC 0x",i:%X;
    i=__readMemory32(0x44,"Register");   __message "R13 ABT 0x",i:%X;
    i=__readMemory32(0x48,"Register");   __message "R14 ABT 0x",i:%X;
    i=__readMemory32(0x4C,"Register");   __message "R13 UND 0x",i:%X;
    i=__readMemory32(0x50,"Register");   __message "R14 UND 0x",i:%X;
    i=__readMemory32(0x54,"Register");   __message "R13 IRQ 0x",i:%X;
    i=__readMemory32(0x58,"Register");   __message "R14 IRQ 0x",i:%X;
    i=__readMemory32(0x5C,"Register");   __message "R08 FIQ 0x",i:%X;
    i=__readMemory32(0x60,"Register");   __message "R09 FIQ 0x",i:%X;
    i=__readMemory32(0x64,"Register");   __message "R10 FIQ 0x",i:%X;
    i=__readMemory32(0x68,"Register");   __message "R11 FIQ 0x",i:%X;
    i=__readMemory32(0x6C,"Register");   __message "R12 FIQ 0x",i:%X;
    i=__readMemory32(0x70,"Register");   __message "R13 FIQ 0x",i:%X;
    i=__readMemory32(0x74,"Register");   __message "R14 FIQ0x",i:%X;
    i=__readMemory32(0x98,"Register");   __message "CPSR     ",i:%X;
    i=__readMemory32(0x94,"Register");   __message "SPSR     ",i:%X;
    i=__readMemory32(0x9C,"Register");   __message "SPSR ABT ",i:%X;
    i=__readMemory32(0xA0,"Register");   __message "SPSR ABT ",i:%X;
    i=__readMemory32(0xA4,"Register");   __message "SPSR UND ",i:%X;
    i=__readMemory32(0xA8,"Register");   __message "SPSR IRQ ",i:%X;
    i=__readMemory32(0xAC,"Register");   __message "SPSR FIQ ",i:%X;

    i=__readMemory32(0xB4,"Register");   __message "PC 0x",i:%X;
}