📄 bsp.c
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/*
*********************************************************************************************************
* Ser_WrStr
*
* Description : Transmits a string using UART0
*
* Arguments : The string that will be transmitted.
*
* Returns : None.
*********************************************************************************************************
*/
void Ser_WrStr (CPU_CHAR *tx_str)
{
while ((*tx_str) != 0) {
Ser_WrByte(*tx_str++);
OSTimeDly(5);
}
}
/*
*********************************************************************************************************
* Ser_RdByte
*
* Description : Receive a single byte using UART0
*
* Arguments : None.
*
* Returns : The received byte
*********************************************************************************************************
*/
CPU_INT08U Ser_RdByte (void)
{
CPU_INT08U rx_byte;
#if SER_COMM_SEL == OS_VIEW_UART_0
while ((AT91C_BASE_US0->US_CSR & AT91C_US_RXRDY) != AT91C_US_RXRDY) {
OSTimeDly(5);
}
rx_byte = (CPU_INT08U)(AT91C_BASE_US0->US_RHR & 0x00FF); /* Remove the data from the holding register */
return (rx_byte);
#endif
}
/*
*********************************************************************************************************
* Ser_RdStr
*
* Description : This function reads a string using Channel 0 of the UART.
*
* Arguments : s A pointer to a buffer at which the string can be stored
* len The size of the string that will be read
*
* Returns : None
*********************************************************************************************************
*/
void Ser_RdStr (CPU_CHAR *rx_str,
CPU_INT32U len)
{
CPU_CHAR input;
CPU_CHAR input_ix;
input_ix = 0;
rx_str[0] = 0;
while (1)
{
input = Ser_RdByte();
if ((input == '\r') ||
(input == '\n')) {
Ser_Printf("\n");
rx_str[input_ix] = 0;
break;
}
if (input == '\b') {
if (input_ix > 0) {
Ser_Printf("\b \b");
input_ix--;
rx_str[input_ix] = 0;
}
}
if (Str_IsPrint(input)) {
Ser_Printf("%c", input);
rx_str[input_ix] = input;
input_ix++;
if (input_ix >= len) {
input_ix = len;
}
}
}
}
/*
*********************************************************************************************************
* Ser_Printf
*
* Description : Formatted outout to the serial port.
* This funcion reads a string from a serial port. This call blocks until a
* character appears at the port and the last character is a Carriage
* Return (0x0D).
*
* Arguments : Format string follwing the C format convention.
*
* Returns : None.
*********************************************************************************************************
*/
void Ser_Printf (CPU_CHAR *format, ...)
{
static CPU_CHAR buffer[80 + 1];
va_list vArgs;
va_start(vArgs, format);
vsprintf((char *)buffer, (char const *)format, vArgs);
va_end(vArgs);
Ser_WrStr((CPU_CHAR*) buffer);
}
/*
******************************************************************************************************************************
******************************************************************************************************************************
** Static Board Support Initialization Functions
******************************************************************************************************************************
******************************************************************************************************************************
*/
/*
*********************************************************************************************************
* DUMMY IRQ HANDLER
*
* Description : This function is called to handle invalid IRQs
*
* Arguments : none
*********************************************************************************************************
*/
static void BSP_DummyISR_Handler (void)
{
AT91C_BASE_AIC->AIC_IVR = 0; /* Debug variant of vector read (protect mode is used) */
}
/*
*********************************************************************************************************
* PLL INITIALIZATION
*
* Description : This function initializes the AT91SAM7X256 PLL thereby setting the frequency of MCK
* which is used by PIT to generate the OS tick interrupt.
*
* Arguments : none
*
* Returns : none
*********************************************************************************************************
*/
static void PLL_Init (void)
{
/* Enable the Main Oscillator */
AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_OSCOUNT | AT91C_CKGR_MOSCEN;
/* Wait for the Main Oscillator to start up */
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS) == 0) {
;
}
/* Conf PLLB assuming input frq BSP_XTAL_FREQ*/
/* Summary: PLLB CLK: 96MHZ, USB CLKS: 48MHZ */
AT91C_BASE_PMC->PMC_PLLBR = (48 << 0) /* [07:00] Divider = 96 */
| AT91C_CKGR_PLLBCOUNT /* [13:08] PLLACount startup dly: 63 SCLKs */
| AT91C_CKGR_OUTB_0
| (499 << 16) /* [26:16] Multiplier = (499 + 1) = 500 */
| AT91C_CKGR_USBDIV_2; /* [29:28] USB Divider = 2 */
/* Wait for the PLL to start up */
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB) == 0) {
;
}
AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLLB_CLK /* Use PLLB CLK as basis */
| AT91C_PMC_PRES_CLK_2 /* Prescaler of 2 => processor clock = PLLBCLK / 2 */
| AT91C_PMC_MDIV_1; /* Master clock is equal to the processor clcok */
/* Wait for the Master Clock (MCK) to start up */
while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) == 0) {
;
}
}
/*
*********************************************************************************************************
* INITIALIZE THE INTERRUPT CONTROLLER
*
* Description : This function is called to disable ALL interrupts.
*
* Arguments : none
*********************************************************************************************************
*/
static void BSP_IntCtrlInit (void)
{
CPU_INT16U i;
BSP_RAM_REMAP_TEST_BYTE = 0xAA; /* Write a byte to address 0x30 */
#ifndef RAM_REMAPPED /* For applications in ROM */
if (BSP_RAM_REMAP_TEST_BYTE == 0xAA) { /* Check if the write to RAM worked */
AT91C_BASE_MATRIX->MATRIX_MCFG = 1; /* Toggle mem map to remapped */
}
OS_CPU_InitExceptVect();
#else /* For applications in RAM */
OS_CPU_InitExceptVect();
#endif
AT91C_BASE_AIC->AIC_EOICR = 0x00000000; /* End-of-interrupt command */
for (i = 0; i < 32; i++) { /* Disable all ISRs */
AT91C_BASE_AIC->AIC_SVR[i] = (CPU_INT32U)BSP_DummyISR_Handler;
AT91C_BASE_AIC->AIC_SMR[i] = 0;
}
}
/*
*********************************************************************************************************
* SDRAM Initialization
*
* Description : This function initializes SDRAM operating parameters
*
* Argument(s) : none
*
* Returns : none
*********************************************************************************************************
*/
static void SDRAM_Init (void)
{
CPU_INT32U *sdram;
CPU_INT32U i;
sdram = (CPU_INT32U *)0x20000000;
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SYS); /* Enable clocks for SDRAM */
/* SDRAM Configuration Register */
AT91C_BASE_SDRAMC->SDRAMC_CR = AT91C_SDRAMC_TXSR_8 /* TXSR [31:28] = 8 Clock Cycles */
| AT91C_SDRAMC_TRAS_5 /* TRAS [27:24] = 5 Clock Cycles */
| AT91C_SDRAMC_TRCD_2 /* TRCD [23:20] = 2 Clock Cycles */
| AT91C_SDRAMC_TRP_2 /* TRP [19:16] = 2 Clock Cycles */
| AT91C_SDRAMC_TRC_7 /* TRC [15:12] = 7 Clock Cycles */
| AT91C_SDRAMC_TWR_2 /* TWR [11:08] = 2 Clock Cycles */
| AT91C_SDRAMC_DBW_32_BITS /* DBW [07:07] = 0 Clock Cycles */
| AT91C_SDRAMC_CAS_3 /* CAS [06:05] = 2 Clock Cycles */
| AT91C_SDRAMC_NB_4_BANKS /* NB [04:04] = 4 Banks */
| AT91C_SDRAMC_NR_13 /* NR [03:02] = 13 Rows Bits */
| AT91C_SDRAMC_NC_9; /* NC [01:00] = 9 Column Bits */
AT91C_BASE_SDRAMC->SDRAMC_MR = AT91C_SDRAMC_MODE_PRCGALL_CMD; /* Issue All Banks Precharge command */
*sdram = 0x00000000; /* Perform write */
for (i = 1; i <= 8; i++) { /* Perform eight refresh cycles */
AT91C_BASE_SDRAMC->SDRAMC_MR = AT91C_SDRAMC_MODE_RFSH_CMD;/* Issue CBR command */
*(sdram + 4 * i) = i; /* Perform write */
}
AT91C_BASE_SDRAMC->SDRAMC_MR = AT91C_SDRAMC_MODE_LMR_CMD; /* Issue Mode Register set command */
*(sdram + 0x24) = 0xcafedede; /* Perform write */
AT91C_BASE_SDRAMC->SDRAMC_TR = 0x000002EE; /* SDRAM Refresh Time (7.81uS * MCLK) */
/* where 7.81uS is the RAM tREF parameter */
AT91C_BASE_SDRAMC->SDRAMC_MR = AT91C_SDRAMC_MODE_NORMAL_CMD; /* Enter normal mode */
*sdram = 0x00000000; /* Perform write */
}
/*
*********************************************************************************************************
* NAND Flash Initialization
*
* Description : This function initializes NAND Flash operating parameters
*
* Argument(s) : none
*
* Returns : none
*********************************************************************************************************
*/
static void NANDFlash_Init (void)
{
/* Setup Smart Media / Onboard NAND device */
/* Timmings are specific to the Micron MT29F2G16AAB (256MB) */
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOC); /* Enable Clocks for NAND Flash (Uses PIOC) */
AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM; /* Enable the address range of CS3 in HMATRIX */
/* Configure SMC CS3 */
AT91C_BASE_SMC->SMC_SETUP3 = (0 << 0) /* NWE setup len = 128 * NWE_SETUP[5] + NWE_SETUP[4:0] */
| (0 << 8) /* NCS setup len = 128 * NCS_WR_SETUP[5] + NCS_WR_SETUP[4:0]*/
| (0 << 16) /* NRD setup len = 128 * NRD_SETUP[5] + NRD_SETUP[4:0] */
| (0 << 24); /* NCS setup len = 128 * NCS_RD_SETUP[5] + NCS_RD_SETUP[4:0]*/
AT91C_BASE_SMC->SMC_PULSE3 = (3 << 0) /* NWE pulse len = 256 * NWE_PULSE[6] + NWE_PULSE[5:0] */
| (0 << 8) /* NCS pulse len = 256 * NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]*/
| (3 << 16) /* NRD pulse len = 256 * NRD_PULSE[6] + NRD_PULSE[5:0] */
| (0 << 24); /* NCS pulse len = 256 * NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]*/
AT91C_BASE_SMC->SMC_CYCLE3 = (5 << 0) /* Wr cycle len = NWE_CYCLE[8:7] * 256 + NWE_CYCLE[6:0] */
| (5 << 16); /* Rd cycle len = NRD_CYCLE[8:7] * 256 + NRD_CYCLE[6:0] */
AT91C_BASE_SMC->SMC_CTRL3 = AT91C_SMC_READMODE /* Reads controlled by the NRD as opposed to NCS Signal */
| AT91C_SMC_WRITEMODE /* Writes controlled by the NWE as opposed to NCS Signal */
| AT91C_SMC_NWAITM_NWAIT_DISABLE /* External NWAIT signal disabled */
| AT91C_SMC_DBW_WIDTH_THIRTY_TWO_BITS /* 32 Bit Data Bus Connected to the NAND Flash Memory */
| (1 << 16); /* TDF Cycles (Data Float Time) = 1 Cycle */
AT91C_BASE_PIOA->PIO_ODR = AT91C_PIO_PC13; /* Set PC13, the Read/Busy signal pin as an input pin */
AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PC13; /* Enable PIO control of PC15 */
AT91C_BASE_PIOA->PIO_PPUER = AT91C_PIO_PC13; /* Enable the Pull-Up resistor for PC15 */
/* Enable the NandFlash */
AT91C_BASE_PIOA->PIO_PER = AT91C_PIO_PC14; /* Enable PIO control of PC14 */
AT91C_BASE_PIOA->PIO_OER = AT91C_PIO_PC14; /* Set PC14 to output */
}
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