📄 goht_pb.drc
字号:
Protel Design System Design Rule Check
PCB File : PCB\GoHT_PB.PCB
Date : 9-Jul-2006
Time : 14:46:09
Processing Rule : Width Constraint (Min=8mil) (Max=200mil) (Prefered=80mil) (On the board )
Rule Violations :0
Processing Rule : Broken-Net Constraint ( (On the board ) )
Rule Violations :0
Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=15mil) (On the board ),(On the board )
Rule Violations :0
Violations Detected : 0
Time Elapsed : 00:00:13
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