bootstrap1.asm

dsp tms320vc5402 起动引导程序

A.1 DSP56364 Bootstrap Program
; BOOTSTRAP CODE FOR DSP56364 - (C) Copyright 1998 Freescale Inc.
; Revised August 11, 1998.
; This is the Bootstrap program contained in the DSP56364 192-word Boot
; ROM. This program can load any program RAM segment from an external
; EPROM or from the SHI serial interface.
--------------------------------------------------------------------------
; If MD:MC:MB:MA=0101, then it loads a program RAM segment from consecutive
; byte-wide P memory locations, starting at P:$D00000 (bits 7-0).
; The memory is selected by the Address Attribute AA1 and is accessed with
; 31 wait states.
; The EPROM bootstrap code expects to read 3 bytes
; specifying the number of program words, 3 bytes specifying the address
; to start loading the program words and then 3 bytes for each program
; word to be loaded. The number of words, the starting address and the
; program words are read least significant byte first followed by the
; mid and then by the most significant byte.
; The program words will be condensed into 24-bit words and stored in
; contiguous PRAM memory locations starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
--------------------------------------------------------------------------
; If MD:MC:MB:MA=0100, then the bootstrap code jumps to the internal
; Program ROM, without loading the Program RAM.
--------------------------------------------------------------------------
; Operation mode MD:MC:MB:MA=0111 is used for burn-in testing.
--------------------------------------------------------------------------
; If MD:MC:MB:MA=11xx, then the Program RAM is loaded from the SHI.
--------------------------------------------------------------------------
		page 132,55,0,0,0
		opt cex,mex,mu
-------------------- GENERAL EQUATES ------------------------
BOOT	 EQU	$D00000		; this is the location in P memory
				; on the external memory bus
				; where the external byte-wide
				; EPROM would be located
AARV	 EQU	$D00409		; AAR1 selects the EPROM as CE~
				; mapped as P from $D00000 to
				; $DFFFFF, active low
PROMADDR EQU	$FF1000 	; Starting PROM address
MA	 EQU	0
MB	 EQU	1
MC	 EQU	2
MD	 EQU	3

-------------------- DSP I/O REGISTERS ------------------------

M_AAR1	EQU	$FFFFF8		; Address Attribute Register 1
M_HRX	EQU	$FFFF94		; SHI Receive FIFO
M_HCSR	EQU	$FFFF91		; SHI Control/Status Register
hrne	EQU	17		; SHI FIFO Not Empty flag
hi2c	EQU	1		; SHI I2C Enable Control Bit
hckfr	EQU	4		; SHI I2C Clock Freeze Control Bit

	ORG	PL:$ff0000,PL:$ff0000	; bootstrap code starts at $ff0000
START
	clr	a #$0,r5		; clear a and init R5 with 0
	jclr	#MC,omr,OMRX0XX		; If MD:MC:MB:MA=x0xx, go to OMRX0XX
	jset	#MD,omr,SHILD		; If MD:MC:MB:MA=11xx, go load from SHI
	jset	#MB,omr,BURN_RES	; If MD:MC:MB:MA=011X, go to BURN/RESERV
	jset	#MA,omr,EPROMLD		; If MD:MC:MB:MA=0101, go load from EPROM
;========================================================================
; This is the routine that jumps to the internal Program ROM.
; MD:MC:MB:MA=0100

	move	#PROMADDR,r1		; store starting PROM address in r1
	bra	<FINISH
;========================================================================
; This is the routine that loads from SHI.
; MD:MC:MB:MA=1100 - reserved
; MD:MC:MB:MA=1101 - Bootstrap from SHI (SPI slave)
; MD:MC:MB:MA=1110 - Bootstrap from SHI (I2C slave, HCKFR=1)
; MD:MC:MB:MA=1111 - Bootstrap from SHI (I2C slave, HCKFR=0)

SHILD

; This is the routine which loads a program through the SHI port.
; The SHI operates in the slave
; mode, with the 10-word FIFO enabled, and with the HREQ pin enabled for
; receive operation. The word size for transfer is 24 bits. The SHI
; operates in the SPI or in the I2C mode, according to the bootstrap mode.
; The program is downloaded according to the following rules:
; 1) 3 bytes - Define the program length.
; 2) 3 bytes - Define the address to which to start loading the program to.
; 3) 3n bytes (while n is the program length defined by the first 3 bytes)
; The program words will be stored in contiguous PRAM memory locations starting
; at the specified starting address.
; After storing the program words, program execution starts from the same
; address where loading started.

	move	#$A9,r1			; prepare SHI control value in r1
					; HEN=1, HI2C=0, HM1-HM0=10, HCKFR=0, HFIFO=1, HMST=0,
					; HRQE1-HRQE0=01, HIDLE=0, HBIE=0, HTIE=0, HRIE1-HRIE0=00
	jclr	#MA,omr,SHI_CF		; If MD:MC:MB:MA=11x0, go to SHI clock freeze
	jclr	#MB,omr,shi_loop	; If MD:MC:MB:MA=1101, select SPI mode
	bset	#hi2c,r1		; otherwise select I2C mode.
shi_loop
	movep	r1,x:M_HCSR		; enable SHI
	jclr	#hrne,x:M_HCSR,*	; wait for no. of words
	movep	x:M_HRX,a0
	jclr	#hrne,x:M_HCSR,*	; wait for starting address
	movep	x:M_HRX,r0
	move	r0,r1
	do	a0,_LOOP2
	jclr	#hrne,x:M_HCSR,*	; wait for HRX not empty
	movep	x:M_HRX,p:(r0)+		; store in Program RAM
	nop				; req. because of restriction
_LOOP2
	bra	<FINISH
SHI_CF
	bset	#hi2c,r1		; select I2C mode.
	bset	#hckfr,r1		; enable clock freeze in I2C mode.
	jset	#MB,omr,shi_loop	; If MD:MC:MB:MA=1110, go to I2C load
	bra	<RESERVED		; If MD:MC:MB:MA=1100, go to reserved
;========================================================================
; This is the routine that loads from external EPROM.
; MD:MC:MB:MA=0101

EPROMLD
	move	#BOOT,r2		; r2 = address of external EPROM
	movep	#AARV,X:M_AAR1		; aar1 configured for SRAM types of access
	do	#6,_LOOP9		; read number of words and starting address
	movem	p:(r2)+,a2		; Get the 8 LSB from ext. P mem.
	asr	#8,a,a			; Shift 8 bit data into A1
_LOOP9
	move	a1,r0			; starting address for load
	move	a1,r1			; save it in r1
					; a0 holds the number of words
	do	a0,_LOOP10		; read program words
	do	#3,_LOOP11		; Each instruction has 3 bytes
	movem	p:(r2)+,a2		; Get the 8 LSB from ext. P mem.
	asr	#8,a,a			; Shift 8 bit data into A1
_LOOP11					; Go get another byte.
	movem	a1,p:(r0)+		; Store 24-bit result in P mem.
	nop				; pipeline delay
_LOOP10					; and go get another 24-bit word.
; Boot from EPROM done
;========================================================================
; This is the exit handler that returns execution to normal
; expanded mode and jumps to the RESET vector.
FINISH
	andi	#$0,ccr			; Clear CCR as if RESET to 0.
	jmp	(r1)			; Then go to starting Prog addr.
;========================================================================
; MD:MC:MB:MA=0111 is Burn-in code
; MD:MC:MB:MA=0110 is reserved
BURN_RES
	jset	#MA,omr,BURN		; If MD:MC:MB:MA=0111, go to BURN
;========================================================================
; The following modes are reserved:
; MD:MC:MB:MA=0110 is reserved
; MD:MC:MB:MA=1100 is reserved
; MD:MC:MB:MA=X0XX are reserved
	OMRX0XX
RESERVED
	bra	<*
;========================================================================
; Code for burn-in
;========================================================================
M_OGDB		EQU	$FFFFFC		; OnCE GDB Register
M_PCRC		EQU	$FFFFBF		; Port C GPIO Control Register
M_PDRC		EQU	$FFFFBD		; Port C GPIO Data Register
M_PRRC		EQU	$FFFFBE		; Port C Direction Register
SCKT		EQU	$3		; SCKT is GPIO bit #3 in ESAI (Port C)
EQUALDATA	EQU	0		; 1 if xram and yram are of equal
; size and addresses, 0 otherwise.
if (EQUALDATA)
	start_dram	EQU	0
	length_dram	EQU	$1600	; same addresses
else
	start_xram	EQU	0	; 1k XRAM
	length_xram	EQU	$0400
	start_yram	EQU	0	; 1.5k YRAM
	length_yram	EQU	$0600
endif
	start_pram	EQU	0	; 0.5k PRAM
	length_pram	EQU	$0200
BURN
; get PATTERN pointer
	clr	b #PATTERNS,r6		; b is the error accumulator
	move	#<(NUM_PATTERNS-1),m6	; program runs forever in
; cyclic form
; configure SCKT as gpio output.
	movep	b,x:M_PDRC		; clear GPIO data register
	bclr	#SCKT,x:M_PCRC		; Define SCKT as output GPIO pin
	bset	#SCKT,x:M_PRRC		; SCKT toggles means test pass
; r5 = test fail flag = $000000
	lua (r5)-,r7			; r7 = test pass flag = $FFFFFF
burnin_loop
	do #9,burn1
;----------------------------
; test RAM
; each pass checks 1 pattern
;----------------------------
	move	p:(r6)+,x1	; pattern for x memory
	move	p:(r6)+,x0	; pattern for y memory
	move	p:(r6)+,y0	; pattern for p memory
; write pattern to all memory locations
if (EQUALDATA)				; x/y ram symmetrical
; write x and y memory
	clr	a	#start_dram,r0	; start of x/y ram
	move	#>length_dram,n0	; length of x/y ram
	rep	n0
	mac	x0,x1,a x,l:(r0)+	; exercise mac, write x/y ram
else	; x/y ram not symmetrical
; write x memory
	clr	a	#start_xram,r0	; start of xram
	move	#>length_xram,n0	; length of xram
	rep	n0
	mac	x0,y0,a x1,x:(r0)+	; exercise mac, write xram
; write y memory
	clr	a	#start_yram,r1	; start of yram
	move	#>length_yram,n1	; length of yram
	rep	n1
	mac	x1,y0,a x0,y:(r1)+	; exercise mac, write yram
endif
; write p memory
	clr	a	#start_pram,r2	; start of pram
	move	#>length_pram,n2	; length of pram
	rep	n2
	move	y0,p:(r2)+		; write pram
; check memory contents
if (EQUALDATA)				; x/y ram symmetrical
; check dram
	clr	a #start_dram,r0	; restore pointer, clear a
	do	n0,_loopd
	move	x:(r0),a1		; a0=a2=0
	eor	x1,a
	add	a,b			; accumulate error in b
	move	y:(r0)+,a1		; a0=a2=0
	eor	x0,a
	add	a,b			; accumulate error in b
_loopd
else	; x/y ram not symmetrical
; check xram
	clr	a #start_xram,r0	; restore pointer, clear a
	do	n0,_loopx
	move	x:(r0)+,a1		; a0=a2=0
	eor	x1,a
	add	a,b			; accumulate error in b
_loopx
; check yram
	clr	a #start_yram,r1	; restore pointer, clear a
	do	n1,_loopy
	move	y:(r1)+,a1		; a0=a2=0
	eor	x0,a
	add	a,b			; accumulate error in b
_loopy
endif
; check pram
	clr	a #start_pram,r2	; restore pointer, clear a
	do	n2,_loopp
	move	p:(r2)+,a1		; a0=a2=0
	eor	y0,a
	add	a,b			; accumulate error in b
_loopp
;---------------------------------------------------
; toggle pin if no errors, stop execution otherwise.
;---------------------------------------------------
; if error
	tne	r5,r7			; r7=$FFFFFF as long as test pass
; condition codes preserved
; this instr can be removed in case of shortage
	movep	r7,x:M_OGDB		; write pass/fail flag to OnCE
; condition codes preserved
; this instr can be removed in case of shortage
	beq	label1
	bclr	#SCKT,x:M_PDRC		; clear SCKT if error,
enddo	; terminate the loop normally
; this instr can be removed in case of shortage
	bra	<burn1			; and stop execution
label1					; if no error
	bchg	#SCKT,x:M_PDRC		; toggle pin and keep on looping
burn1					; test completion
debug					; enter debug mode if OnCE port enabled
; this instr can be removed in case of shortage
	wait				; enter wait otherwise (OnCE port disabled)
BURN_END
	ORG PL:,PL:
PATTERNS dsm 4				; align for correct modulo addressing
	ORG PL:BURN_END,PL:BURN_END
dup PATTERNS-* ; write address in unused Boot ROM location
	dc	*
endm
	ORG	PL:PATTERNS,PL:PATTERNS	; Each value is written to all memories
	dc	$555555
	dc	$AAAAAA
	dc	$333333
	dc	$F0F0F0
NUM_PATTERNS	EQU	*-PATTERNS
;========================================================================
; This code fills the unused bootstrap rom locations with their address
dup $FF00C0-*
dc *
endm
;========================================================================
; Reserved Area in the Program ROM: upper 128 words.
; Address range: $FF2F80 - $FF2FFF
;========================================================================
ORG PL:$FF2F80,PL:$FF2F80
; This code fills the unused rom locations with their address
	dup	$FF3000-*
	dc	*
	endm
	end