📄 stc91ml.mac.svn-base
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;************************************************************************/
;* */
;* This file is a Toshiba TMP91CU27UG-9999 start up routines */
;* Application : DPTV */
;* MCU : TMP91CU27UG-9999 */
;* Main Clock : fc=27MHz */
;* */
;* Copyright (C) Trident Multimedia Technologies (Shanghai) Co., Ltd. */
;* 2005 All rights reserved. */
;* Revision: */
;* 12/10/2005 Created by Lewis */
;************************************************************************/
$MAXIMUM
module stc91ml_mac
#include "A91Cx27U.h"
/* External Function Definition */ ; +RYZ 12/23/2004
extern __startup /* Reset/SWI 0 */
extern __Int_SWI1 /* SWI 1 */
extern __Int_SWI2 /* INTUNDEF/SWI 2 */
extern __Int_SWI3 /* SWI 3 */
extern __Int_SWI4 /* SWI 4 */
extern __Int_SWI5 /* SWI 5 */
extern __Int_SWI6 /* SWI 6 */
extern __Int_SWI7 /* SWI 7 */
extern __Int_NMI /* NMI */
extern __Int_INTWD /* INTWD */
extern __Int_INT0 /* INT0 */
extern __Int_INT1 /* INT1 */
extern __Int_INT2 /* INT2 */
extern __Int_INT3 /* INT3 */
extern __Int_INT4 /* INT4 */
extern __Int_INT5 /* INT5 */
extern __Int_INT6 /* INT6 */
extern __Int_INT7 /* INT7 */
extern __Int_INT8 /* INT8 */
extern __Int_INTTA0 /* INTTA0 */
extern __Int_INTTA1 /* INTTA1 */
extern __Int_INTTA2 /* INTTA2 */
extern __Int_INTTA3 /* INTTA3 */
extern __Int_INTTA4 /* INTTA4 */
extern __Int_INTTA5 /* INTTA5 */
extern __Int_INTTA6 /* INTTA6 */
extern __Int_INTTA7 /* INTTA7 */
extern __Int_INTTB00 /* INTTB00 */
extern __Int_INTTB01 /* INTTB01 */
extern __Int_INTTB10 /* INTTB10 */
extern __Int_INTTB11 /* INTTB11 */
extern __Int_INTTBOF0 /* INTTBOF0 */
extern __Int_INTTBOF1 /* INTTBOF1 */
extern __Int_INTRX0 /* INTRX0 */
extern __Int_INTTX0 /* INTTX0 */
extern __Int_INTRX1 /* INTRX1 */
extern __Int_INTTX1 /* INTTX1 */
extern __Int_INTS2 /* INTS2 */
extern __Int_INTRTC /* INTRTC */
extern __Int_INTAD /* INTAD */
extern __Int_INTTC0 /* INTTC0 */
extern __Int_INTTC1 /* INTTC1 */
extern __Int_INTTC2 /* INTTC2 */
extern __Int_INTTC3 /* INTTC3 */
extern _main
#ifdef USE_T_QUAD
BaseXSP equ 0x4FFF ; Stack area bottom address
#else
BaseXSP equ 0x3800 ; Stack area bottom address
#endif
;===[ External symbol definition ]====================================
extern large __DataRAM ; Defined in 'lnc91.lcf'
;=====================================================================
; [ Dummy section ]
; This part is for initialize of f_area and f_data section.
; Do not rewrite this part.
;=====================================================================
f_area section data large align=2,2
f_data section data large align=2,2
;=====================================================================
; [ Startup routine ]
; This part is start up routine.
; Rewrite this part to fit your program.
;
;==[ Caution !! ]=====================================================
; Don't use following instructions before setting XSP.
; ( CALL condition, dst ) , ( CALR dst )
; ( LINK dst, num ) , ( POP dst )
; ( POP SR ) , ( PUSH SR )
; ( PUSH src ) , ( RET condition )
; ( RETD num ) , ( RETI )
; ( SWI num ) , ( UNLK dst )
;=====================================================================
#ifndef USE_T_QUAD
startup_code section code abs=0xffb000 ; Startup routine Section
#else
f_code section code large ; Startup routine Section
#endif
;===[ Global symbol '__startup' definition ]==========================
public __startup ; Used in 'ini91ml.c'
__startup:
DI
ldb (_WDMOD),0x00 ; [for RTE] WDT disable
ldb (_WDCR),0xb1 ;
;=====Enable system clock and CS/wait setting=====
LD (_EMCCR1),0x1F ;EMCCR1 = 0x1F
;=====System clock setting=====
LD (_SYSCR0),0xA0 ;SYSCR0 = 0xA0;
LD (_SYSCR1),0x00 ;SYSCR1 = 0x00;
LD (_SYSCR2),0x2C ;SYSCR2 = 0x2C;
;=====CS0(code area) and CS2(EX area) settings=====
LD (_MSAR0),0x01 ;MSAR0 = 0x01
LD (_MAMR0),0x01 ;MAMR0 = 0x01
#ifdef USE_T_QUAD
LD (_MSAR2),0x20 ;MSAR2 = 0xF8
#else
LD (_MSAR2),0xF8 ;MSAR2 = 0xF8
#endif
LD (_MAMR2),0x0F ;MAMR2 = 0x0F
LD (_B2CS),0x89 ;B2CS = 0x89
LD (_B0CS),0x89 ;B0CS = 0x89
#ifdef USE_T_QUAD
LD (_P4FC),0x07 ;P4FC = 0x07
LD (_P4CR),0x07 ;P4CR = 0x07
#else
LD (_P4FC),0x05 ;P4FC = 0x05
LD (_P4CR),0x07 ;P4CR = 0x05
#endif
LD (_EMCCR0),0x2B;
;=====Disable system clock and CS/wait setting=====
LD (_EMCCR1),0x00 ;EMCCR1 = 0x00
;=====Port 2 setting
LD (_P2CR),0x3F
#ifdef USE_T_QUAD
LD (_P2FC),0x3F
#else
#ifdef _TK204B_
LD (_P2FC),0x0F
#else
LD (_P2FC),0x07
#endif
#endif
;=====[ Setting Stack Pointer ]=====
ld XSP,BaseXSP ; For Setting XSP
;=====[ RAM CLEAR ]=====
ld xde,startof(f_area)
ld xbc,sizeof(f_area)
ld ix,bc
srl 1,xbc
j z,FAR_AREA_2
ld xhl,xde
ldw (xde+),0
sub xbc,1
j z,FAR_AREA_2
ldirw (xde+),(xhl+)
cp qbc,0
j eq,FAR_AREA_2
ld wa,qbc
FAR_AREA_3:
ldirw (xde+),(xhl+)
djnz wa,FAR_AREA_3
FAR_AREA_2:
bit 0,ix
j z,FAR_AREA_1
ldb (xde),0
FAR_AREA_1:
;=====[ Initialize of f_data section ]=====
ld xde,__DataRAM
ld xhl,startof(f_data)
ld xbc,sizeof(f_data)
or xbc,xbc
j z,FAR_DATA_1
ldirb (XDE+),(XHL+)
cp qbc,0
j eq,FAR_DATA_1
ld wa,qbc
FAR_DATA_2:
ldirb (xde+),(xhl+)
djnz wa,FAR_DATA_2
FAR_DATA_1:
;=====[ Jump to main routine ]=====
j _main ; Defined in 'ini91ml.c'
#ifdef USE_T_QUAD
vec_usr section code
usr_vec:
jp __startup /* Reset/SWI 0 */
jp __Int_SWI1 /* SWI 1 */
jp __Int_SWI2 /* INTUNDEF/SWI 2 */
jp __Int_SWI3 /* SWI 3 */
jp __Int_SWI4 /* SWI 4 */
jp __Int_SWI5 /* SWI 5 */
jp __Int_SWI6 /* SWI 6 */
jp __Int_SWI7 /* SWI 7 */
jp __Int_NMI /* NMI */
jp __Int_INTWD /* INTWD */
jp __Int_INT0 /* INT0 */
jp __Int_INT1 /* INT1 */
jp __Int_INT2 /* INT2 */
jp __Int_INT3 /* INT3 */
jp __Int_INT4 /* INT4 */
jp __Int_INT5 /* INT5 */
jp __Int_INT6 /* INT6 */
jp __Int_INT7 /* INT7 */
jp __Int_INT8 /* INT8 */
jp __Int_INTTA0 /* INTTA0 */
jp __Int_INTTA1 /* INTTA1 */
jp __Int_INTTA2 /* INTTA2 */
jp __Int_INTTA3 /* INTTA3 */
jp __Int_INTTA4 /* INTTA4 */
jp __Int_INTTA5 /* INTTA5 */
jp __Int_INTTA6 /* INTTA6 */
jp __Int_INTTA7 /* INTTA7 */
jp __Int_INTTB00 /* INTTB00 */
jp __Int_INTTB01 /* INTTB01 */
jp __Int_INTTB10 /* INTTB10 */
jp __Int_INTTB11 /* INTTB11 */
jp __Int_INTTBOF0 /* INTTBOF0 */
jp __Int_INTTBOF1 /* INTTBOF1 */
jp __Int_INTRX0 /* INTRX0 */
jp __Int_INTTX0 /* INTTX0 */
jp __Int_INTRX1 /* INTRX1 */
jp __Int_INTTX1 /* INTTX1 */
jp __Int_INTS2 /* INTS2 */
jp __Int_INTRTC /* INTRTC */
jp __Int_INTAD /* INTAD */
jp __Int_INTTC0 /* INTTC0 */
jp __Int_INTTC1 /* INTTC1 */
jp __Int_INTTC2 /* INTTC2 */
jp __Int_INTTC3 /* INTTC3 */
#endif
end
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