stc91ml_4k.mac.svn-base

最新火热的ＣＸ３２ 源代码

;************************************************************************/
;*									*/
;* This file is a Toshiba TMP91CU27UG-9999 start up routines     	*/
;* Application			: DPTV				        */
;* MCU				: TMP91CU27UG-9999      	        */
;* Main Clock			: fc=27MHz			        */
;*									*/
;* Copyright (C) Trident Multimedia Technologies (Shanghai) Co., Ltd.   */
;*                    2005  All rights reserved.                        */
;* Revision:                                                            */
;* 2005.10.12     Created by Lewis					*/
;************************************************************************/

$MAXIMUM
	module	stc91ml_mac	

	
#include "A91Cx27U.h"

/* External Function Definition */    
extern	_main 

;=====================================================================
; [ Define MCU address ]
;  This part is definition of target MCU's ROM/RAM address.
;  Rewrite this part to fit your system.
;=====================================================================
BaseXSP		equ		0x2000		; Stack area bottom address

;===[ External symbol definition ]====================================

	extern	 large	  __DataRAM	; Defined in 'lnc91.lcf'

;=====================================================================
; [ Dummy section ]
;  This part is for initialize of f_area and f_data section.
;  Do not rewrite this part.
;=====================================================================
f_area	section  data  large  align=2,2
f_data	section  data  large  align=2,2

;=====================================================================
; [ Startup routine ]
;  This part is start up routine.
;  Rewrite this part to fit your program.
;
;==[ Caution !! ]=====================================================
;  Don't use following instructions before setting XSP.
;	( CALL	condition, dst )  ,  ( CALR  dst )
;	( LINK	dst, num )		  ,  ( POP	 dst )
;	( POP	SR )		  ,  ( PUSH  SR )
;	( PUSH	src )		  ,  ( RET	 condition )
;	( RETD	num )		  ,  ( RETI )
;	( SWI	num )		  ,  ( UNLK  dst )
;=====================================================================

TMP91FY27UG_ 	 equ 	0	;		256K flash
TMP91CU27UG9999_ equ 	1	;		romless
TMP91CU27UG_	 equ	2	;		mask 96K

MCU_TYPE	equ	TMP91CU27UG9999_

#if (MCU_TYPE==TMP91CU27UG9999_)
startup_code  section  code  abs=0xff0000    ; Startup routine Section
#else
f_code	section  code  large	; Startup routine Section
#endif

;===[ Global symbol '__startup' definition ]==========================
	public	__startup	; Used in 'ini91ml.c'
__startup:
        DI

	ldb	(_WDMOD),0x00	; [for RTE] WDT disable
	ldb	(_WDCR),0xb1	;

	;=====Enable system clock and CS/wait setting=====
        LD (_EMCCR1),0x1F ;EMCCR1 = 0x1F    
	;=====System clock setting=====
	LD (_SYSCR0),0xA0  ;SYSCR0 = 0xA0;
        LD (_SYSCR1),0x00  ;SYSCR1 = 0x00;
	LD (_SYSCR2),0x2C  ;SYSCR2 = 0x2C;
        ;=====CS0(code area) and CS2(EX area) settings=====
	LD (_MSAR0),0x01 ;MSAR0 = 0x01
	LD (_MAMR0),0x01 ;MAMR0 = 0x01
	LD (_MSAR2),0xF8 ;MSAR2 = 0xF8
	LD (_MAMR2),0x0F ;MAMR2 = 0x0F
        LD (_B2CS),0x89 ;B2CS = 0x89
	LD (_B0CS),0x89 ;B0CS = 0x89
#ifdef USE_T_QUAD
	LD (_P4FC),0x07 ;P4FC = 0x07
	LD (_P4CR),0x07 ;P4CR = 0x07
#else
	LD (_P4FC),0x05 ;P4FC = 0x05
	LD (_P4CR),0x07 ;P4CR = 0x05
#endif
        LD (_EMCCR0),0x2B;
	;=====Disable system clock and CS/wait setting=====
	LD (_EMCCR1),0x00 ;EMCCR1 = 0x00 
        ;=====Port 2 setting
        LD (_P2CR),0x3F
#ifdef USE_T_QUAD
	LD (_P2FC),0x0F
#else
	LD (_P2FC),0x07
#endif
        ;=====[ Setting Stack Pointer ]=====
	ld	XSP,BaseXSP    ; For Setting XSP
        
	;=====[ RAM CLEAR ]=====
	ld	xde,startof(f_area)
	ld	xbc,sizeof(f_area)
	ld	ix,bc
	srl	1,xbc
	j	z,FAR_AREA_2
	ld	xhl,xde
	ldw	(xde+),0
	sub	xbc,1
	j	z,FAR_AREA_2
	ldirw	(xde+),(xhl+)
	cp	qbc,0
	j	eq,FAR_AREA_2
	ld	wa,qbc
FAR_AREA_3:
	ldirw	(xde+),(xhl+)
	djnz	wa,FAR_AREA_3
FAR_AREA_2:
	bit	0,ix
	j	z,FAR_AREA_1
	ldb	(xde),0
FAR_AREA_1:
        ;=====[ Initialize of f_data section ]=====
	ld	xde,__DataRAM
	ld	xhl,startof(f_data)
	ld	xbc,sizeof(f_data)
	or	xbc,xbc
	j	z,FAR_DATA_1
	ldirb	(XDE+),(XHL+)
	cp	qbc,0
	j	eq,FAR_DATA_1
	ld	wa,qbc
FAR_DATA_2:
	ldirb	(xde+),(xhl+)
	djnz	wa,FAR_DATA_2
FAR_DATA_1:
        ;=====[ Jump to main routine ]=====
	j	_main	   ; Defined in 'ini91ml.c'

	end