📄 2.6.20-rc1-at91.patch.gz
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++static struct resource dk_s1dfb_resource[] = {+ [0] = { /* video mem */+ .name = "s1d13806 memory",+ .start = AT91_FB_VMEM_BASE,+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,+ .flags = IORESOURCE_MEM,+ },+ [1] = { /* video registers */+ .name = "s1d13806 registers",+ .start = AT91_FB_REG_BASE,+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,+ .flags = IORESOURCE_MEM,+ },+};++static struct platform_device dk_s1dfb_device = {+ .name = "s1d13806fb",+ .id = -1,+ .dev = {+ .dma_mask = &s1dfb_dmamask,+ .coherent_dma_mask = 0xffffffff,+ .platform_data = &dk_s1dfb_pdata,+ },+ .resource = dk_s1dfb_resource,+ .num_resources = ARRAY_SIZE(dk_s1dfb_resource),+};++static void __init dk_add_device_video(void)+{+ platform_device_register(&dk_s1dfb_device);+}+#else+static void __init dk_add_device_video(void) {}+#endif++static struct eth_platform_data __initdata dk_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 1, };@@ -170,6 +349,13 @@ .num_resources = 1, }; +static struct at91_gpio_led dk_leds[] = {+ {+ .name = "led0",+ .gpio = AT91_PIN_PB2,+ .trigger = "timer",+ }+}; static void __init dk_board_init(void) {@@ -200,8 +386,10 @@ at91_add_device_nand(&dk_nand_data); /* NOR Flash */ platform_device_register(&dk_flash);+ /* LEDs */+ at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds)); /* VGA */-// dk_add_device_video();+ dk_add_device_video(); } MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-eb9200.c linux-2.6/arch/arm/mach-at91rm9200/board-eb9200.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-eb9200.c Fri Dec 15 08:35:48 2006+++ linux-2.6/arch/arm/mach-at91rm9200/board-eb9200.c Thu Nov 23 15:50:12 2006@@ -65,7 +65,7 @@ at91rm9200_init_interrupts(NULL); } -static struct at91_eth_data __initdata eb9200_eth_data = {+static struct eth_platform_data __initdata eb9200_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 1, };diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-ek.c linux-2.6/arch/arm/mach-at91rm9200/board-ek.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-ek.c Fri Dec 15 08:35:48 2006+++ linux-2.6/arch/arm/mach-at91rm9200/board-ek.c Fri Dec 15 09:42:32 2006@@ -73,7 +73,188 @@ at91rm9200_init_interrupts(NULL); } -static struct at91_eth_data __initdata ek_eth_data = {+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)+#include <video/s1d13xxxfb.h>+#include <asm/arch/ics1523.h>++/* EPSON S1D13806 FB */+#define AT91_FB_REG_BASE 0x40000000L+#define AT91_FB_REG_SIZE 0x200+#define AT91_FB_VMEM_BASE 0x40200000L+#define AT91_FB_VMEM_SIZE 0x140000L++static void __init ek_init_video(void)+{+ /* NWAIT Signal */+ at91_set_A_periph(AT91_PIN_PC6, 0);++ /* Initialization of the Static Memory Controller for Chip Select 3 */+ at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16 /* 16 bit */+ | AT91_SMC_WSEN | AT91_SMC_NWS_(5) /* wait states */+ | AT91_SMC_TDF_(1) /* float time */+ );++ AT91F_ICS1523_clockinit();+}++/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)+ Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */+static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {+ {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */+ {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */+ {S1DREG_GPIO_CNF0, 0xFF}, // 0x00+ {S1DREG_GPIO_CNF1, 0x1F}, // 0x08+ {S1DREG_GPIO_CTL0, 0x00},+ {S1DREG_GPIO_CTL1, 0x00},+ {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/+ {S1DREG_LCD_CLK_CNF, 0x00},+ {S1DREG_CRT_CLK_CNF, 0x00},+ {S1DREG_MPLUG_CLK_CNF, 0x00},+ {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */+ {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */+ {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */+ {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */+ {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */+ {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */+ {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */+ {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */+ {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */+ {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */+ {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */+ {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},+ {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */+ {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */+ {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */+ {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */+ {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */+ {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */+ {S1DREG_LCD_DISP_START0, 0x00},+ {S1DREG_LCD_DISP_START1, 0xC8},+ {S1DREG_LCD_DISP_START2, 0x00},+ {S1DREG_LCD_MEM_OFF0, 0x80},+ {S1DREG_LCD_MEM_OFF1, 0x02},+ {S1DREG_LCD_PIX_PAN, 0x00},+ {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},+ {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},+ {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */+ {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */+ {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */+ {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */+ {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},+ {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */+ {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */+ {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */+ {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */+ {S1DREG_TV_OUT_CTL, 0x10},+ {0x005E, 0x9F},+ {0x005F, 0x00},+ {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */+ {S1DREG_CRT_DISP_START0, 0x00},+ {S1DREG_CRT_DISP_START1, 0x00},+ {S1DREG_CRT_DISP_START2, 0x00},+ {S1DREG_CRT_MEM_OFF0, 0x80},+ {S1DREG_CRT_MEM_OFF1, 0x02},+ {S1DREG_CRT_PIX_PAN, 0x00},+ {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},+ {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},+ {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */+ {S1DREG_LCD_CUR_START, 0x01},+ {S1DREG_LCD_CUR_XPOS0, 0x00},+ {S1DREG_LCD_CUR_XPOS1, 0x00},+ {S1DREG_LCD_CUR_YPOS0, 0x00},+ {S1DREG_LCD_CUR_YPOS1, 0x00},+ {S1DREG_LCD_CUR_BCTL0, 0x00},+ {S1DREG_LCD_CUR_GCTL0, 0x00},+ {S1DREG_LCD_CUR_RCTL0, 0x00},+ {S1DREG_LCD_CUR_BCTL1, 0x1F},+ {S1DREG_LCD_CUR_GCTL1, 0x3F},+ {S1DREG_LCD_CUR_RCTL1, 0x1F},+ {S1DREG_LCD_CUR_FIFO_HTC, 0x00},+ {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */+ {S1DREG_CRT_CUR_START, 0x01},+ {S1DREG_CRT_CUR_XPOS0, 0x00},+ {S1DREG_CRT_CUR_XPOS1, 0x00},+ {S1DREG_CRT_CUR_YPOS0, 0x00},+ {S1DREG_CRT_CUR_YPOS1, 0x00},+ {S1DREG_CRT_CUR_BCTL0, 0x00},+ {S1DREG_CRT_CUR_GCTL0, 0x00},+ {S1DREG_CRT_CUR_RCTL0, 0x00},+ {S1DREG_CRT_CUR_BCTL1, 0x1F},+ {S1DREG_CRT_CUR_GCTL1, 0x3F},+ {S1DREG_CRT_CUR_RCTL1, 0x1F},+ {S1DREG_CRT_CUR_FIFO_HTC, 0x00},+ {S1DREG_BBLT_CTL0, 0x00},+ {S1DREG_BBLT_CTL0, 0x00},+ {S1DREG_BBLT_CC_EXP, 0x00},+ {S1DREG_BBLT_OP, 0x00},+ {S1DREG_BBLT_SRC_START0, 0x00},+ {S1DREG_BBLT_SRC_START1, 0x00},+ {S1DREG_BBLT_SRC_START2, 0x00},+ {S1DREG_BBLT_DST_START0, 0x00},+ {S1DREG_BBLT_DST_START1, 0x00},+ {S1DREG_BBLT_DST_START2, 0x00},+ {S1DREG_BBLT_MEM_OFF0, 0x00},+ {S1DREG_BBLT_MEM_OFF1, 0x00},+ {S1DREG_BBLT_WIDTH0, 0x00},+ {S1DREG_BBLT_WIDTH1, 0x00},+ {S1DREG_BBLT_HEIGHT0, 0x00},+ {S1DREG_BBLT_HEIGHT1, 0x00},+ {S1DREG_BBLT_BGC0, 0x00},+ {S1DREG_BBLT_BGC1, 0x00},+ {S1DREG_BBLT_FGC0, 0x00},+ {S1DREG_BBLT_FGC1, 0x00},+ {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */+ {S1DREG_LKUP_ADDR, 0x00},+ {S1DREG_PS_CNF, 0x10}, /* Power Save disable */+ {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */+ {S1DREG_CPU2MEM_WDOGT, 0x00},+ {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */+};++static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {+ .initregs = ek_s1dfb_initregs,+ .initregssize = ARRAY_SIZE(ek_s1dfb_initregs),+ .platform_init_video = ek_init_video,+};++static u64 s1dfb_dmamask = 0xffffffffUL;++static struct resource ek_s1dfb_resource[] = {+ [0] = { /* video mem */+ .name = "s1d13806 memory",+ .start = AT91_FB_VMEM_BASE,+ .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,+ .flags = IORESOURCE_MEM,+ },+ [1] = { /* video registers */+ .name = "s1d13806 registers",+ .start = AT91_FB_REG_BASE,+ .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,+ .flags = IORESOURCE_MEM,+ },+};++static struct platform_device ek_s1dfb_device = {+ .name = "s1d13806fb",+ .id = -1,+ .dev = {+ .dma_mask = &s1dfb_dmamask,+ .coherent_dma_mask = 0xffffffff,+ .platform_data = &ek_s1dfb_pdata,+ },+ .resource = ek_s1dfb_resource,+ .num_resources = ARRAY_SIZE(ek_s1dfb_resource),+};++static void __init ek_add_device_video(void)+{+ platform_device_register(&ek_s1dfb_device);+}+#else+static void __init ek_add_device_video(void) {}+#endif++static struct eth_platform_data __initdata ek_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 1, };@@ -132,6 +313,18 @@ .num_resources = 1, }; +static struct at91_gpio_led ek_leds[] = {+ {+ .name = "led0",+ .gpio = AT91_PIN_PB1,+ .trigger = "heartbeat",+ },+ {+ .name = "led1",+ .gpio = AT91_PIN_PB2,+ .trigger = "timer",+ }+}; static void __init ek_board_init(void) {@@ -158,8 +351,10 @@ #endif /* NOR Flash */ platform_device_register(&ek_flash);+ /* LEDs */+ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); /* VGA */-// ek_add_device_video();+ ek_add_device_video(); } MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-kafa.c linux-2.6/arch/arm/mach-at91rm9200/board-kafa.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-kafa.c Fri Dec 15 08:33:10 2006+++ linux-2.6/arch/arm/mach-at91rm9200/board-kafa.c Thu Nov 23 15:50:12 2006@@ -67,7 +67,7 @@ at91rm9200_init_interrupts(NULL); } -static struct at91_eth_data __initdata kafa_eth_data = {+static struct eth_platform_data __initdata kafa_eth_data = { .phy_irq_pin = AT91_PIN_PC4, .is_rmii = 0, };diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-kb9202.c linux-2.6/arch/arm/mach-at91rm9200/board-kb9202.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/board-kb9202.c Fri Dec 15 08:35:48 2006+++ linux-2.6/arch/arm/mach-at91rm9200/board-kb9202.c Thu Nov 23 15:50:12 2006@@ -68,7 +68,7 @@ at91rm9200_init_interrupts(NULL); } -static struct at91_eth_data __initdata kb9202_eth_data = {+static struct eth_platform_data __initdata kb9202_eth_data = { .phy_irq_pin = AT91_PIN_PB29, .is_rmii = 0, };diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/clock.c linux-2.6/arch/arm/mach-at91rm9200/clock.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/clock.c Fri Dec 15 08:35:48 2006+++ linux-2.6/arch/arm/mach-at91rm9200/clock.c Thu Nov 23 15:37:15 2006@@ -375,6 +375,7 @@ seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR)); seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));+#warning "Hard-coded PCK" for (i = 0; i < 4; i++) seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i))); seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/gpio.c linux-2.6/arch/arm/mach-at91rm9200/gpio.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/gpio.c Fri Dec 15 08:35:48 2006+++ linux-2.6/arch/arm/mach-at91rm9200/gpio.c Thu Dec 14 14:51:15 2006@@ -20,7 +20,6 @@ #include <asm/io.h> #include <asm/hardware.h> #include <asm/arch/at91_pio.h>-#include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> #include "generic.h"@@ -224,17 +223,17 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state) { unsigned mask = pin_to_mask(pin);+ unsigned bank = (pin - PIN_BASE) / 32; - pin -= PIN_BASE;- pin /= 32;-- if (unlikely(pin >= MAX_GPIO_BANKS))+ if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; if (state)- wakeups[pin] |= mask;+ wakeups[bank] |= mask; else- wakeups[pin] &= ~mask;+ wakeups[bank] &= ~mask;++ set_irq_wake(gpio[bank].id, state); return 0; }@@ -246,29 +245,15 @@ for (i = 0; i < gpio_banks; i++) { u32 pio = gpio[i].offset; - /*- * Note: drivers should have disabled GPIO interrupts that- * aren't supposed to be wakeup sources.- * But that is not much good on ARM..... disable_irq() does- * not update the hardware immediately, so the hardware mask- * (IMR) has the wrong value (not current, too much is- * permitted).- *- * Our workaround is to disable all non-wakeup IRQs ...- * which is exactly what correct drivers asked for in the- * first place!- */ backups[i] = at91_sys_read(pio + PIO_IMR); at91_sys_write(pio + PIO_IDR, backups[i]); at91_sys_write(pio + PIO_IER, wakeups[i]); - if (!wakeups[i]) {- disable_irq_wake(gpio[i].id);- at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id);- } else {- enable_irq_wake(gpio[i].id);+ if (!wakeups[i])+ clk_disable(gpio[i].clock);+ else { #ifdef CONFIG_PM_DEBUG- printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);+ printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); #endif } }@@ -283,7 +268,9 @@ at91_sys_write(pio + PIO_IDR, wakeups[i]); at91_sys_write(pio + PIO_IER, backups[i]);- at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id);++ if (!wakeups[i])+ clk_enable(gpio[i].clock); } } diff -urN -x CVS linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/ics1523.c linux-2.6/arch/arm/mach-at91rm9200/ics1523.c--- linux-2.6.20-rc1.orig/arch/arm/mach-at91rm9200/ics1523.c Thu Jan 1 02:00:00 1970+++ linux-2.6/arch/arm/mach-at91rm9200/ics1523.c Tue Oct 24 14:59:00 2006@@ -0,0 +1,227 @@+/*+ * arch/arm/mach-at91rm9200/ics1523.c+ *+ * Copyright (C) 2003 ATMEL Rousset+ *+ * This program is free software; you can redistribute it and/or modify+ * it under the terms of the GNU General Public License as published by+ * the Free Software Foundation; either version 2 of the License, or+ * (at your option) any later version.+ *+ * This program is distributed in the hope that it will be useful,+ * but WITHOUT ANY WARRANTY; without even the implied warranty of+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the+ * GNU General Public License for more details.⌨️ 快捷键说明
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