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📄 flash.s79

📁 IAPBootLoader源程序是单片机ARM的在系统编程方法1
💻 S79
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        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x80000000
        STR      R1,[R0, #+0]
//   58   /* Wait until the write operation is completed */
//   59   FLASH_WaitForLastTask();
        BL       FLASH_WaitForLastTask
//   60 }
        POP      {R4,R5,PC}       ;; return
        CFI EndBlock cfiBlock1
//   61 
//   62 /*******************************************************************************
//   63 * Function Name  : FLASH_SectorErase
//   64 * Description    : Erases a Flash sector.
//   65 * Input 1        : Sectors to be Erased.
//   66 * Return         : None.
//   67 *******************************************************************************/

        RSEG CODE_Flash:CODE:NOROOT(2)
        CFI Block cfiBlock2 Using cfiCommon0
        CFI Function FLASH_SectorErase
        ARM
//   68 void FLASH_SectorErase(u32 Xsectors)
//   69 {
FLASH_SectorErase:
        PUSH     {R4,LR}
        CFI ?RET Frame(CFA, -4)
        CFI R4 Frame(CFA, -8)
        CFI CFA R13+8
        MOVS     R4,R0
//   70   /* Wait until another operation going on is completed */
//   71   FLASH_WaitForLastTask();
        BL       FLASH_WaitForLastTask
//   72   /* Set the Sector Erase flag 'SER' in the CRO reg */
//   73   FLASHR->CR0 |= FLASH_SER_Mask;
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x8000000
        STR      R1,[R0, #+0]
//   74   /* Select in the CR1 register the Sectors to be erased  */
//   75   FLASHR->CR1 |= Xsectors;
        MOV      R0,#+1073741828
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741828
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R4,R1
        STR      R1,[R0, #+0]
//   76   /* Set the Write Mode Start bit 'WMS' in the CR0 Reg to Start Erase Operation */
//   77   FLASHR->CR0 |= FLASH_WMS_Mask;
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x80000000
        STR      R1,[R0, #+0]
//   78   /* Wait until the erase operation is completed */
//   79   FLASH_WaitForLastTask();
        BL       FLASH_WaitForLastTask
//   80 }
        POP      {R4,PC}          ;; return
        CFI EndBlock cfiBlock2
//   81 
//   82 /*******************************************************************************
//   83 * Function Name  : FLASH_WritePrConfig
//   84 * Description    : Enable Write protection or Disable temporarily Write
//   85 *                  protection of a flash sector.
//   86 * Input 1        : Flash Sector.
//   87 * Input 2        : Enable or disable Flash sector Write Protection.
//   88 * Return         : None.
//   89 *******************************************************************************/

        RSEG CODE_Flash:CODE:NOROOT(2)
        CFI Block cfiBlock3 Using cfiCommon0
        CFI Function FLASH_WritePrConfig
        ARM
//   90 void FLASH_WritePrConfig(u32 Xsectors, FunctionalState NewState)
//   91 {
FLASH_WritePrConfig:
        PUSH     {R4,R5,LR}
        CFI ?RET Frame(CFA, -4)
        CFI R5 Frame(CFA, -8)
        CFI R4 Frame(CFA, -12)
        CFI CFA R13+12
        MOVS     R4,R0
        MOVS     R5,R1
//   92   /* Wait until another operation going on is completed */
//   93   FLASH_WaitForLastTask();
        BL       FLASH_WaitForLastTask
//   94   /* Enable Xsectors write protection */
//   95   if (NewState == ENABLE)
        CMP      R5,#+1
        BNE      ??FLASH_WritePrConfig_0
//   96   {
//   97     /* Set the Set protection Bit */
//   98     FLASHR->CR0 |= FLASH_SPR_Mask;
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x1000000
        STR      R1,[R0, #+0]
//   99     /* Set the Register Address */
//  100     FLASHR->AR  = 0x4010DFB0;
        MOV      R0,#+1073741840
        ORR      R0,R0,#0x100000
        LDR      R1,??FLASH_WritePrConfig_1  ;; 0x4010dfb0
        STR      R1,[R0, #+0]
//  101     /* Data to be programmed to the Protection Register */
//  102     FLASHR->DR0  = ~Xsectors;
        MOV      R0,#+1073741832
        ORR      R0,R0,#0x100000
        MVNS     R1,R4
        STR      R1,[R0, #+0]
//  103     /* Set the WMS bit to Start the Sequence */
//  104     FLASHR->CR0 |= FLASH_WMS_Mask;
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x80000000
        STR      R1,[R0, #+0]
        B        ??FLASH_WritePrConfig_2
//  105   }
//  106   /* Unprotect temporarily Flash sector */
//  107   else
//  108   {
//  109     /* Set the Set protection Bit */
//  110     FLASHR->CR0 |= FLASH_SPR_Mask;
??FLASH_WritePrConfig_0:
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x1000000
        STR      R1,[R0, #+0]
//  111     /* Set the Register Address */
//  112     FLASHR->AR  = 0x4010DFB0;
        MOV      R0,#+1073741840
        ORR      R0,R0,#0x100000
        LDR      R1,??FLASH_WritePrConfig_1  ;; 0x4010dfb0
        STR      R1,[R0, #+0]
//  113     /* Data to be programmed to the Protection Register */
//  114     FLASHR->DR0  = FLASHPR->NVWPAR|Xsectors;
        MOV      R0,#+1073741832
        ORR      R0,R0,#0x100000
        LDR      R1,??FLASH_WritePrConfig_1  ;; 0x4010dfb0
        LDR      R1,[R1, #+0]
        ORRS     R1,R4,R1
        STR      R1,[R0, #+0]
//  115     /* Set the WMS bit to Start the Sequence */
//  116     FLASHR->CR0 |= FLASH_WMS_Mask;
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        MOV      R1,#+1073741824
        ORR      R1,R1,#0x100000
        LDR      R1,[R1, #+0]
        ORRS     R1,R1,#0x80000000
        STR      R1,[R0, #+0]
//  117   }
//  118 }
??FLASH_WritePrConfig_2:
        POP      {R4,R5,PC}       ;; return
        DATA
??FLASH_WritePrConfig_1:
        DC32     0x4010dfb0
        CFI EndBlock cfiBlock3
//  119 
//  120 /*******************************************************************************
//  121 * Function Name  : FLASH_WaitForLastTask
//  122 * Description    : Waits for the end of last task on a Flash Bank.
//  123 * Input 1        : None.
//  124 * Return         : None.
//  125 *******************************************************************************/

        RSEG CODE_Flash:CODE:NOROOT(2)
        CFI Block cfiBlock4 Using cfiCommon0
        CFI Function FLASH_WaitForLastTask
        ARM
//  126 void FLASH_WaitForLastTask(void)
//  127 {
//  128   while (FLASHR->CR0&0x16);
FLASH_WaitForLastTask:
??FLASH_WaitForLastTask_0:
        MOV      R0,#+1073741824
        ORR      R0,R0,#0x100000
        LDR      R0,[R0, #+0]
        TST      R0,#0x16
        BNE      ??FLASH_WaitForLastTask_0
//  129 }
        MOV      PC,LR            ;; return
        CFI EndBlock cfiBlock4

        END
//  130 
//  131 /*******************(C)COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
// 
// 536 bytes in segment CODE_Flash
// 
// 536 bytes of CODE memory
//
//Errors: none
//Warnings: none

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