📄 uart.s79
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// 57 /*******************************************************************************
// 58 * Function Name : UART_FifoConfig
// 59 * Description : This function enables or disables the Rx and Tx FIFOs of
// 60 * the selected UART.
// 61 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 62 * Input 2 : ENABLE or DISABLE
// 63 * Output : None
// 64 * Return : None
// 65 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock5 Using cfiCommon0
CFI Function UART_FifoConfig
ARM
// 66 void UART_FifoConfig(UART_TypeDef *UARTx, FunctionalState NewStatus)
// 67 {
// 68 if (NewStatus==ENABLE) UARTx->CR|=0x0400; else UARTx->CR&=~0x0400;
UART_FifoConfig:
CMP R1,#+1
BNE ??UART_FifoConfig_0
LDRH R2,[R0, #+12]
ORRS R2,R2,#0x400
STRH R2,[R0, #+12]
B ??UART_FifoConfig_1
??UART_FifoConfig_0:
LDRH R2,[R0, #+12]
MOV R3,#+255
ORR R3,R3,#0xFB00
ANDS R2,R3,R2
STRH R2,[R0, #+12]
// 69 }
??UART_FifoConfig_1:
MOV PC,LR ;; return
CFI EndBlock cfiBlock5
// 70
// 71 /*******************************************************************************
// 72 * Function Name : UART_FifoReset
// 73 * Description : This function resets the Rx and the Tx FIFOs of the
// 74 * selected UART.
// 75 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 76 * Input 2 : UART_RxFIFO or UART_TxFIFO
// 77 * Output : None
// 78 * Return : None
// 79 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock6 Using cfiCommon0
CFI Function UART_FifoReset
ARM
// 80 void UART_FifoReset(UART_TypeDef *UARTx, UARTFIFO_TypeDef FIFO)
// 81 {
// 82 if (FIFO==UART_RxFIFO) UARTx->RxRSTR=0xFFFF; else UARTx->TxRSTR=0xFFFF;
UART_FifoReset:
CMP R1,#+0
BNE ??UART_FifoReset_0
MOV R2,#+255
ORR R2,R2,#0xFF00
STRH R2,[R0, #+36]
B ??UART_FifoReset_1
??UART_FifoReset_0:
MOV R2,#+255
ORR R2,R2,#0xFF00
STRH R2,[R0, #+32]
// 83 }
??UART_FifoReset_1:
MOV PC,LR ;; return
CFI EndBlock cfiBlock6
// 84
// 85 /*******************************************************************************
// 86 * Function Name : UART_LoopBackConfig
// 87 * Description : This function enables or disables the loop back mode of
// 88 * the selected UART.
// 89 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 90 * Input 2 : ENABLE or DISABLE
// 91 * Output : None
// 92 * Return : None
// 93 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock7 Using cfiCommon0
CFI Function UART_LoopBackConfig
ARM
// 94 void UART_LoopBackConfig(UART_TypeDef *UARTx, FunctionalState NewStatus)
// 95 {
// 96 if (NewStatus==ENABLE) UARTx->CR|=0x0040; else UARTx->CR&=~0x0040;
UART_LoopBackConfig:
CMP R1,#+1
BNE ??UART_LoopBackConfig_0
LDRH R2,[R0, #+12]
ORRS R2,R2,#0x40
STRH R2,[R0, #+12]
B ??UART_LoopBackConfig_1
??UART_LoopBackConfig_0:
LDRH R2,[R0, #+12]
MOV R3,#+191
ORR R3,R3,#0xFF00
ANDS R2,R3,R2
STRH R2,[R0, #+12]
// 97 }
??UART_LoopBackConfig_1:
MOV PC,LR ;; return
CFI EndBlock cfiBlock7
// 98
// 99 /*******************************************************************************
// 100 * Function Name : UART_RxConfig
// 101 * Description : This function enables or disables the UART data reception.
// 102 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 103 * Input 2 : ENABLE or DISABLE
// 104 * Output : None
// 105 * Return : None
// 106 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock8 Using cfiCommon0
CFI Function UART_RxConfig
ARM
// 107 void UART_RxConfig(UART_TypeDef *UARTx, FunctionalState NewStatus)
// 108 {
// 109 if (NewStatus==ENABLE) UARTx->CR|=0x0100; else UARTx->CR&=~0x0100;
UART_RxConfig:
CMP R1,#+1
BNE ??UART_RxConfig_0
LDRH R2,[R0, #+12]
ORRS R2,R2,#0x100
STRH R2,[R0, #+12]
B ??UART_RxConfig_1
??UART_RxConfig_0:
LDRH R2,[R0, #+12]
MOV R3,#+255
ORR R3,R3,#0xFE00
ANDS R2,R3,R2
STRH R2,[R0, #+12]
// 110 }
??UART_RxConfig_1:
MOV PC,LR ;; return
CFI EndBlock cfiBlock8
// 111
// 112 /*******************************************************************************
// 113 * Function Name : UART_OnOffConfig
// 114 * Description : This function sets On/Off the selected UART.
// 115 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 116 * Input 2 : ENABLE or DISABLE
// 117 * Output : None
// 118 * Return : None
// 119 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock9 Using cfiCommon0
CFI Function UART_OnOffConfig
ARM
// 120 void UART_OnOffConfig(UART_TypeDef *UARTx, FunctionalState NewStatus)
// 121 {
// 122 if (NewStatus==ENABLE) UARTx->CR|=0x0080; else UARTx->CR&=~0x0080;
UART_OnOffConfig:
CMP R1,#+1
BNE ??UART_OnOffConfig_0
LDRH R2,[R0, #+12]
ORRS R2,R2,#0x80
STRH R2,[R0, #+12]
B ??UART_OnOffConfig_1
??UART_OnOffConfig_0:
LDRH R2,[R0, #+12]
MOV R3,#+127
ORR R3,R3,#0xFF00
ANDS R2,R3,R2
STRH R2,[R0, #+12]
// 123 }
??UART_OnOffConfig_1:
MOV PC,LR ;; return
CFI EndBlock cfiBlock9
// 124
// 125 /*******************************************************************************
// 126 * Function Name : UART_ByteSend
// 127 * Description : This function sends a data byte to the selected UART.
// 128 * Input 1 : UARTx (x can be 0,1, 2 or 3) the desired UART
// 129 * Input 2 : A pointer to the data byte to send
// 130 * Output : None
// 131 * Return : None
// 132 *******************************************************************************/
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock10 Using cfiCommon0
CFI Function UART_ByteSend
ARM
// 133 void UART_ByteSend(UART_TypeDef *UARTx, u8 *Data)
// 134 {
// 135 if (UARTx->CR & (0x0001<<UART_FIFOEnableBit))// if FIFO ENABLED
UART_ByteSend:
LDRH R2,[R0, #+12]
TST R2,#0x400
BEQ ??UART_ByteSend_0
// 136 while((UARTx->SR & UART_TxFull)); // while the UART_TxFIFO contain 16 characters.
??UART_ByteSend_1:
LDRH R2,[R0, #+20]
TST R2,#0x200
BNE ??UART_ByteSend_1
B ??UART_ByteSend_2
// 137 else // if FIFO DISABLED
// 138 while (!(UARTx->SR & UART_TxEmpty)); // while the transmit shift register not empty
??UART_ByteSend_0:
LDRH R2,[R0, #+20]
TST R2,#0x2
BEQ ??UART_ByteSend_0
// 139 UARTx->TxBUFR = *Data;
??UART_ByteSend_2:
LDRB R2,[R1, #+0]
STRH R2,[R0, #+4]
// 140 }
MOV PC,LR ;; return
CFI EndBlock cfiBlock10
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock11 Using cfiCommon0
CFI NoFunction
ARM
??RCCU_FrequencyValue??rA:
LDR R12,??Subroutine0_0 ;; RCCU_FrequencyValue
MOV PC,R12
DATA
??Subroutine0_0:
DC32 RCCU_FrequencyValue
CFI EndBlock cfiBlock11
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock12 Using cfiCommon0
CFI NoFunction
ARM
??rA??divu32_a:
LDR R12,??Subroutine1_0 ;; ??divu32_a
MOV PC,R12
DATA
??Subroutine1_0:
DC32 ??divu32_a
CFI EndBlock cfiBlock12
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock13 Using cfiCommon0
CFI NoFunction
ARM
??UART_ModeConfig??rA:
LDR R12,??Subroutine2_0 ;; UART_ModeConfig
MOV PC,R12
DATA
??Subroutine2_0:
DC32 UART_ModeConfig
CFI EndBlock cfiBlock13
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock14 Using cfiCommon0
CFI NoFunction
ARM
??UART_ParityConfig??rA:
LDR R12,??Subroutine3_0 ;; UART_ParityConfig
MOV PC,R12
DATA
??Subroutine3_0:
DC32 UART_ParityConfig
CFI EndBlock cfiBlock14
RSEG CODE_Flash:CODE:NOROOT(2)
CFI Block cfiBlock15 Using cfiCommon0
CFI NoFunction
ARM
??UART_StopBitsConfig??rA:
LDR R12,??Subroutine4_0 ;; UART_StopBitsConfig
MOV PC,R12
DATA
??Subroutine4_0:
DC32 UART_StopBitsConfig
CFI EndBlock cfiBlock15
END
// 141
// 142
// 143 /******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
//
// 556 bytes in segment CODE_Flash
//
// 400 bytes of CODE memory (+ 156 bytes shared)
//
//Errors: none
//Warnings: none
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