📄 fw_task.lst
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\ 0000002C ........ _BLF po_lock,??po_lock??rT?CODE_I
137 USB_TX = 0;
\ 00000030 0020 MOV R0,#+0
\ 00000032 2060 STR R0,[R4, #+0]
138 po_unlock();
\ 00000034 ........ _BLF po_unlock,??po_unlock??rT?CODE_I
139 }
140 else
141 {
142 /* nothing to do */
143 }
144 }
145 }
146 }
\ ??usb_task_1:
\ 00000038 10BC POP {R4}
\ 0000003A 01BC POP {R0}
\ 0000003C 0047 BX R0 ;; return
\ 0000003E C046 NOP
\ ??usb_task_2:
\ 00000040 ........ DC32 USB_RX
\ 00000044 ........ DC32 USB_TX
147
148 /*****************************************************************
149 *
150 * ROUTINE fw_isr
151 *
152 *-----------------------------------------------------------------
153 *
154 * Purpose :
155 * Interrupt routine wake on SOF arrival
156 *
157 * IT:
158 * USB End Of Bus Reset Interrupt
159 * (UDP) Endpoint 0 Interrupt : EP CTRL
160 * (UDP) Endpoint 1 Interrupt : EP BULK IN
161 * (UDP) Endpoint 2 Interrupt : EP BULK OUT
162 * (UDP) USB Suspend Interrupt
163 * (UDP) USB Resume Interrupt
164 *
165 * Input parameters : NONE
166 *
167 * Output parameters : NONE
168 *
169 * Global data :
170 *
171 *****************************************************************/
172 #ifdef ADS_COMPIL
173 void fw_isr(void)
174 #else
\ In segment CODE_I, align 4, keep-with-next
175 __ramfunc void fw_isr(void)
176 #endif
177 {
\ fw_isr:
\ 00000000 F0B5 PUSH {R4-R7,LR}
178 ULONG _IT_reg_b1 = 0;
179 #ifndef AT91SAM9265
180 AT91PS_PMC pPMC = AT91C_BASE_PMC;
181 #endif
182
183 fw_deviceState |= FW_DS_INISR;
\ 00000002 924C LDR R4,??fw_isr_0 ;; fw_deviceState
\ 00000004 2078 LDRB R0,[R4, #+0]
\ 00000006 2021 MOV R1,#+32
\ 00000008 0143 ORR R1,R0
\ 0000000A 2170 STRB R1,[R4, #+0]
\ 0000000C 9048 LDR R0,??fw_isr_0+0x4 ;; countLed
\ 0000000E 0078 LDRB R0,[R0, #+0]
\ 00000010 0028 CMP R0,#+0
\ 00000012 07D1 BNE ??fw_isr_1
184
185 #ifdef USE_LED
186 if(countLed == 0)
187 {
188 AT91F_LED_blinkSpeed(1);
\ 00000014 8F48 LDR R0,??fw_isr_0+0x8 ;; 0xfffcc230
\ 00000016 9049 LDR R1,??fw_isr_0+0xC ;; 0xfffcc228
\ 00000018 0968 LDR R1,[R1, #+0]
\ 0000001A 4908 LSR R1,R1,#+1
\ 0000001C 0160 STR R1,[R0, #+0]
189 countLed = 1;
\ 0000001E 8C48 LDR R0,??fw_isr_0+0x4 ;; countLed
\ 00000020 0121 MOV R1,#+1
\ 00000022 0170 STRB R1,[R0, #+0]
190 }
191 #endif
192 fw_IsrCount++;
\ ??fw_isr_1:
\ 00000024 8D48 LDR R0,??fw_isr_0+0x10 ;; fw_IsrCount
\ 00000026 0168 LDR R1,[R0, #+0]
\ 00000028 491C ADD R1,R1,#+1
\ 0000002A 0160 STR R1,[R0, #+0]
193
194 _IT_reg_b1 = fw_readInterruptRegister();
\ 0000002C ........ _BLF fw_readInterruptRegister,??fw_readInterruptRegister??rT?CODE_I
\ 00000030 061C MOV R6,R0
\ 00000032 0825 MOV R5,#+8
\ 00000034 0028 CMP R0,#+0
\ 00000036 .... BNE .+5
\ 00000038 E1E0 B ??fw_isr_2
\ 0000003A 894F LDR R7,??fw_isr_0+0x14 ;; 0xfffb0030
\ 0000003C F004 LSL R0,R6,#+19
\ 0000003E 2DD5 BPL ??fw_isr_3
195
196
197 // TRACE_DEBUG_L( "\n\rIT=%#08lx\n\r", _IT_reg_b1);
198
199 // If we have an Interrupt
200 if(_IT_reg_b1 != 0 )
201 {
202 /**********************************/
203 /* USB End Of Bus Reset Interrupt */
204 /**********************************/
205 if(_IT_reg_b1 & AT91C_UDP_ENDBUSRES)
206 {
207 AT91F_UDP_DisableIt( USBDEV_BASE_UDP, DISABLE_ALL_IT );
\ 00000040 8848 LDR R0,??fw_isr_0+0x18 ;; 0xfffb0014
\ 00000042 8949 LDR R1,??fw_isr_0+0x1C ;; 0x2f0f
\ 00000044 0160 STR R1,[R0, #+0]
208
209 AT91F_UDP_InterruptClearRegister( USBDEV_BASE_UDP, CLEAR_ALL_IT );
\ 00000046 8948 LDR R0,??fw_isr_0+0x20 ;; 0xfffb0020
\ 00000048 FC21 MOV R1,#+252
\ 0000004A 8901 LSL R1,R1,#+6 ;; #+16128
\ 0000004C 0160 STR R1,[R0, #+0]
210 /* USB Interrupt Enable Register */
211 /* AT91C_UDP_EPINT0 : Endpoint 0 Interrupt */
212 /* AT91C_UDP_RXSUSP : USB Suspend Interrupt */
213 /* AT91C_UDP_RXRSM : USB Resume Interrupt */
214 /* AT91C_UDP_EXTRSM : USB External Resume Interrupt */
215 /* AT91C_UDP_SOFINT : USB Start Of frame Interrupt */
216 AT91F_UDP_EnableIt( USBDEV_BASE_UDP, AT91C_UDP_EPINT0| AT91C_UDP_RXSUSP
217 | AT91C_UDP_RXRSM | AT91C_UDP_EXTRSM
218 | AT91C_UDP_SOFINT );
\ 0000004E 8848 LDR R0,??fw_isr_0+0x24 ;; 0xfffb0010
\ 00000050 8849 LDR R1,??fw_isr_0+0x28 ;; 0xf01
\ 00000052 0160 STR R1,[R0, #+0]
219
220 #ifdef USE_LED
221 countLed = 0;
\ 00000054 7E48 LDR R0,??fw_isr_0+0x4 ;; countLed
\ 00000056 0021 MOV R1,#+0
\ 00000058 0170 STRB R1,[R0, #+0]
222 AT91F_LED_off(0);
\ 0000005A 8748 LDR R0,??fw_isr_0+0x2C ;; 0xfffcc210
\ 0000005C 0160 STR R1,[R0, #+0]
223 AT91F_LED_off(1);
\ 0000005E 7D48 LDR R0,??fw_isr_0+0x8 ;; 0xfffcc230
\ 00000060 0160 STR R1,[R0, #+0]
224 #endif
225
226 USB_EVENT |= USB_EVENT_MASK_UNPLUG;
\ 00000062 8648 LDR R0,??fw_isr_0+0x30 ;; USB_EVENT
\ 00000064 8549 LDR R1,??fw_isr_0+0x30 ;; USB_EVENT
\ 00000066 0978 LDRB R1,[R1, #+0]
\ 00000068 2943 ORR R1,R5
\ 0000006A 0170 STRB R1,[R0, #+0]
227 fw_busReset();
\ 0000006C ........ _BLF fw_busReset,??fw_busReset??rT?CODE_I
228
229 // Reset all endpoint
230 AT91F_UDP_ResetEp( USBDEV_BASE_UDP, 0x0000FFFF );
\ 00000070 8348 LDR R0,??fw_isr_0+0x34 ;; 0xfffb0028
\ 00000072 8449 LDR R1,??fw_isr_0+0x38 ;; 0xffff
\ 00000074 0160 STR R1,[R0, #+0]
\ 00000076 0021 MOV R1,#+0
\ 00000078 0160 STR R1,[R0, #+0]
231
232
233 #ifdef disableALLdmaEPT
234 ///////////////////////////////////////
235 // RESET endpoint canal DMA:
236 // DMA stop channel command
237 AT91F_UDPHS_CfgDMAControl( USBDEV_BASE_UDP, FW_EP_BULK_IN, 0 ); // STOP command
238
239 // Disable endpoint
240 AT91F_UDPHS_EpClear( USBDEV_BASE_UDP, FW_EP_BULK_IN, 0XFFFFFFFF );
241
242 // Reset endpoint config
243 AT91F_UDPHS_CfgEpSet( USBDEV_BASE_UDP, FW_EP_BULK_IN, 0 );
244
245 // Reset DMA channel (Buff count and Control field)
246 AT91F_UDPHS_CfgDMAControl( USBDEV_BASE_UDP, FW_EP_BULK_IN, 2 ); // NON STOP command
247
248 // Reset DMA channel 0 (STOP)
249 AT91F_UDPHS_CfgDMAControl( USBDEV_BASE_UDP, FW_EP_BULK_IN, 0 ); // STOP command
250
251 // Clear DMA channel status (read the register for clear it)
252 //StaticValue =
253 AT91F_UDPHS_GetDMAStatus( USBDEV_BASE_UDP, FW_EP_BULK_IN );
254 ///////////////////////////////////////
255 #endif
256
257
258 #ifndef AT91SAM9265
259 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_CTRL, AT91C_UDP_EPTYPE_CTRL );
\ 0000007A 3868 LDR R0,[R7, #+0]
\ 0000007C 3860 STR R0,[R7, #+0]
260 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_BULK_IN, AT91C_UDP_EPTYPE_BULK_IN );
\ 0000007E 8248 LDR R0,??fw_isr_0+0x3C ;; 0xfffb0034
\ 00000080 0168 LDR R1,[R0, #+0]
\ 00000082 C022 MOV R2,#+192
\ 00000084 D200 LSL R2,R2,#+3 ;; #+1536
\ 00000086 0A43 ORR R2,R1
\ 00000088 0260 STR R2,[R0, #+0]
261 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_BULK_OUT, AT91C_UDP_EPTYPE_BULK_OUT );
\ 0000008A 8048 LDR R0,??fw_isr_0+0x40 ;; 0xfffb0038
\ 0000008C 0168 LDR R1,[R0, #+0]
\ 0000008E AA01 LSL R2,R5,#+6
\ 00000090 0A43 ORR R2,R1
\ 00000092 0260 STR R2,[R0, #+0]
262 #else
263
264
265 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_CTRL,
266 AT91C_EPT_SIZE_8 | AT91C_EPT_DIR_OUT | AT91C_EPT_TYPE_CTL_EPT | AT91C_BK_NUMBER_1 );
267 // 0x40 );
268 if( (AT91F_UDPHS_EpGet( USBDEV_BASE_UDP, FW_EP_CTRL ) & AT91C_EPT_MAPPED) != AT91C_EPT_MAPPED )
269 {
270 TRACE_FATAL("\n\r PB FW_EP_CTRL\n\r");
271 for(;;);
272 }
273 // Endpoint type Bulk IN and Enable Endpoint
274 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_BULK_IN,
275 AT91C_EPT_SIZE_64 | AT91C_EPT_DIR_IN | AT91C_EPT_TYPE_BUL_EPT | AT91C_BK_NUMBER_1 );
276 //0x6B );
277 if( (AT91F_UDPHS_EpGet( USBDEV_BASE_UDP, FW_EP_BULK_IN ) & AT91C_EPT_MAPPED) != AT91C_EPT_MAPPED )
278 {
279 TRACE_FATAL("\n\r PB FW_EP_BULK_IN\n\r");
280 for(;;);
281 }
282 // Endpoint type Bulk OUT and Enable Endpoint
283 AT91F_UDP_EpSet( USBDEV_BASE_UDP, FW_EP_BULK_OUT,
284 AT91C_EPT_SIZE_64 | AT91C_EPT_DIR_OUT | AT91C_EPT_TYPE_BUL_EPT | AT91C_BK_NUMBER_1 );
285 //0x63 );
286 if( (AT91F_UDPHS_EpGet( USBDEV_BASE_UDP, FW_EP_BULK_OUT ) & AT91C_EPT_MAPPED) != AT91C_EPT_MAPPED )
287 {
288 TRACE_FATAL("\n\r PB FW_EP_BULK_OUT\n\r");
289 for(;;);
290 }
291
292 AT91F_UDPHS_CfgEnableEp( USBDEV_BASE_UDP, FW_EP_CTRL,
293 AT91C_NAK_OUT | AT91C_NAK_IN | AT91C_STALL_SENT_ERROR_CRC_ISO | AT91C_RX_SETUP_ERROR_FLOW_ISO
294 | AT91C_TX_COMPLETE | AT91C_RX_BK_RDY | AT91C_OVERFLOW_ERROR );
295 //0x0000F700 );//AT91C_RX_SETUP_ERROR_FLOW_ISO;
296 #endif
297
298 // Enable endpoint CTRL
299 AT91F_UDP_EnableEp( USBDEV_BASE_UDP, FW_EP_CTRL );
\ 00000094 3868 LDR R0,[R7, #+0]
\ 00000096 2903 LSL R1,R5,#+12
\ 00000098 0143 ORR R1,R0
\ 0000009A 3960 STR R1,[R7, #+0]
\ ??fw_isr_3:
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