timer_asm.asm

This site include optimized H.264 baseline codec, SF IP Box Binary. PC version and TI DM6437 version

;///*!
;// ************************************************************************
;// * 
;// *
;// * The library contain AVC H.264 baseline codec,which can process video
;// * less than 12 minutes. 
;// *
;// * (C) Copyright 2007 by Tonald DL
;// * All rights reserved 
;// *
;// * Date: 2007-08-11
;// * Version: 070811A
;// * Contact Personal: Tonald DL
;// * Email: [e-mail]
;// * 
;// ************************************************************************
;// */

	.sect "S264CODE_REF"


	
;//////////////////////////////////////////////////////////////////////////////
;//
;//
;//	int TIMER_INIT(void);
;//
;//	Initiate CPU Timer by writing to TSCL
;//	Branch Return - Wait 1 cycle to allow TSCL to go to one prior to reading 
;//	Read TSCL - Should = 0x000000001 if  timer was not already running 
;//	Read TSCH - Should = 0x000000000 if  timer was not already running 
;//	Compare TSCL to 1, A1 = -1 => CSL_ESYS_FAIL (Generic CSL Failure) 
;//	Compare TSCH to 0 if TSCL == 0x1 Copy TSCL to Return Register (should be 1) 
;//	If TSCH != 0 or TSCH != 1 then Return (CSL_ESYS_FAIL) Fill Delay Slot of Branch
;//////////////////////////////////////////////////////////////////////////////
	.align 8
	.global _TIMER_INIT    
_TIMER_INIT:

		ZERO .D2 B4
	||	ZERO .D1 A4


		DINT

		MVC .S2 B4,TSCH

		MVC .S2 B4,TSCL

		NOP 4

		MVC .S2 TSCL,B4
		
		MVC .S2 TSCL,B5

		RINT

		CMPEQ .L2 1,B4,B0

		[B0] CMPEQ .L2 0h,B5,B0

		[B0] MVK .S1 -1,A4

		BNOP .S2 B3,5

;//////////////////////////////////////////////////////////////////////////////
;//
;//
;//	int TIMER_READ(void *_addr1,void *_addr2);
;//
;//	Branch Return Pointer
;//	Disable Interrupts to insure TSCH is read  after TSCL w/o interrupt inbetween 
;//	Read TSCL
;//	Reenable Interrupts after TSCH is read
;//	Read TSCH
;//	Store TSCL to *timerLow Store TSCL to *timerHigh
;//	Set Return to 1, CSL_SOK - (Success)
        
;//////////////////////////////////////////////////////////////////////////////
;//	A4	void *_addr1
;//	B4	void *_addr2

	.align 8
	.global _TIMER_READ    
_TIMER_READ:

		DINT

		MVC .S2 TSCL,B0
	
		MVC .S2 TSCH,B1

		NOP 4

		RINT
		
		STW .D1T2 B0,*A4
	
		STW .D2 B1,*B4

		MVK .S1 1,A4

		BNOP .S2 B3,5
			
	.end