📄 f34x_msd_uart.src
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; .\F34x_MSD_UART.SRC generated from: F34x_MSD_UART.c
; COMPILER INVOKED BY:
; C:\Keil\C51\BIN\C51.EXE F34x_MSD_UART.c LARGE OPTIMIZE(9,SPEED) BROWSE NOAREGS DEBUG OBJECTEXTEND SRC(.\F34x_MSD_UART.SRC)
$NOMOD51
NAME F34X_MSD_UART
CCF2 BIT 0D8H.2
TB80 BIT 098H.3
SPI0CKR DATA 0A2H
CCF3 BIT 0D8H.3
P0 DATA 080H
SPIEN BIT 0F8H.0
CCF4 BIT 0D8H.4
P1 DATA 090H
P2 DATA 0A0H
ADC0CF DATA 0BCH
P3 DATA 0B0H
AC BIT 0D0H.6
P4 DATA 0C7H
EIE1 DATA 0E6H
START_STOP_SPI BIT 0B0H.0
EA BIT 0A8H.7
MCE0 BIT 098H.5
EIE2 DATA 0E7H
USB0XCN DATA 0D7H
PSCTL DATA 08FH
CF BIT 0D8H.7
IT01CF DATA 0E4H
ADC0CN DATA 0E8H
P0MDOUT DATA 0A4H
P1MDOUT DATA 0A5H
TMR2RLH DATA 0CBH
IE DATA 0A8H
P2MDOUT DATA 0A6H
T2CE BIT 0C8H.4
P3MDOUT DATA 0A7H
TMR3RLH DATA 093H
EIP1 DATA 0F6H
P4MDOUT DATA 0AEH
TXBMT BIT 0F8H.1
EIP2 DATA 0F7H
PCA0CPH0 DATA 0FCH
TMR2RLL DATA 0CAH
PCA0CPH1 DATA 0EAH
TMR3RLL DATA 092H
PCA0CPH2 DATA 0ECH
CR BIT 0D8H.6
T2SPLIT BIT 0C8H.3
TF2H BIT 0C8H.7
PCA0CPH3 DATA 0EEH
REN0 BIT 098H.4
PCA0CPH4 DATA 0FEH
PCA0CPL0 DATA 0FBH
EMI0CF DATA 085H
PCA0CPL1 DATA 0E9H
PCA0CPM0 DATA 0DAH
PCA0MD DATA 0D9H
PCA0CN DATA 0D8H
PCA0CPL2 DATA 0EBH
PCA0CPM1 DATA 0DBH
TF2L BIT 0C8H.6
PCA0CPL3 DATA 0EDH
PCA0CPM2 DATA 0DCH
IP DATA 0B8H
ARBLOST BIT 0C0H.2
PCA0CPL4 DATA 0FDH
PCA0CPM3 DATA 0DDH
PCA0CPM4 DATA 0DEH
CY BIT 0D0H.7
SI BIT 0C0H.0
XBR0 DATA 0E1H
SMB0CF DATA 0C1H
XBR1 DATA 0E2H
PFE0CN DATA 0AFH
EMI0CN DATA 0AAH
XBR2 DATA 0E3H
REF0CN DATA 0D1H
REG0CN DATA 0C9H
AD0INT BIT 0E8H.5
SP DATA 081H
EMI0TC DATA 084H
OV BIT 0D0H.2
SMB0CN DATA 0C0H
MODF BIT 0F8H.5
SBCON1 DATA 0ACH
START_STOP_WRITE_TO BIT 0B0H.2
S0MODE BIT 098H.7
VDM0CN DATA 0FFH
P0MDIN DATA 0F1H
CPT0MD DATA 09DH
CPT0CN DATA 09BH
P1MDIN DATA 0F2H
CPT1MD DATA 09CH
CPT1CN DATA 09AH
P2MDIN DATA 0F3H
TF2LEN BIT 0C8H.5
P3MDIN DATA 0F4H
P4MDIN DATA 0F5H
SBRLH1 DATA 0B5H
SPI0CN DATA 0F8H
PCON DATA 087H
SBRLL1 DATA 0B4H
SPIF BIT 0F8H.7
TMOD DATA 089H
TCON DATA 088H
WCOL BIT 0F8H.6
NSSMD0 BIT 0F8H.2
NSSMD1 BIT 0F8H.3
TMR2CN DATA 0C8H
P0SKIP DATA 0D4H
TMR3CN DATA 091H
START_STOP_READ_TO BIT 0B0H.1
T2XCLK BIT 0C8H.0
P1SKIP DATA 0D5H
P2SKIP DATA 0D6H
P3SKIP DATA 0DFH
IE0 BIT 088H.1
CPT0MX DATA 09FH
IE1 BIT 088H.3
OSCICL DATA 0B3H
CPT1MX DATA 09EH
CLKSEL DATA 0A9H
B DATA 0F0H
ADC0H DATA 0BEH
OSCICN DATA 0B2H
OSCLCN DATA 086H
ADC0L DATA 0BDH
ACC DATA 0E0H
ES0 BIT 0A8H.4
AD0EN BIT 0E8H.7
ET0 BIT 0A8H.1
ET1 BIT 0A8H.3
TF0 BIT 088H.5
CLKMUL DATA 0B9H
ET2 BIT 0A8H.5
RI0 BIT 098H.0
TF1 BIT 088H.7
TH0 DATA 08CH
EX0 BIT 0A8H.0
TI0 BIT 098H.1
IT0 BIT 088H.0
PCA0H DATA 0FAH
TH1 DATA 08DH
MASTER BIT 0C0H.7
EX1 BIT 0A8H.2
IT1 BIT 088H.2
P BIT 0D0H.0
ACK BIT 0C0H.1
OSCXCN DATA 0B1H
TL0 DATA 08AH
PCA0L DATA 0F9H
TL1 DATA 08BH
TXMODE BIT 0C0H.6
PS0 BIT 0B8H.4
PT0 BIT 0B8H.1
RS0 BIT 0D0H.3
PT1 BIT 0B8H.3
RS1 BIT 0D0H.4
PT2 BIT 0B8H.5
TR0 BIT 088H.4
AD0TM BIT 0E8H.6
TR1 BIT 088H.6
TR2 BIT 0C8H.2
PX0 BIT 0B8H.0
PX1 BIT 0B8H.2
DPH DATA 083H
ADC0GTH DATA 0C4H
DPL DATA 082H
ADC0GTL DATA 0C3H
SBUF0 DATA 099H
ESPI0 BIT 0A8H.6
SBUF1 DATA 0D3H
ADC0LTH DATA 0C6H
RSTSRC DATA 0EFH
SCON0 DATA 098H
SMOD1 DATA 0E5H
SCON1 DATA 0D2H
AMX0N DATA 0BAH
ADC0LTL DATA 0C5H
AMX0P DATA 0BBH
STA BIT 0C0H.5
PSPI0 BIT 0B8H.6
SMB0DAT DATA 0C2H
TMR2H DATA 0CDH
SPI0CFG DATA 0A1H
TMR3H DATA 095H
CKCON DATA 08EH
T2CSS BIT 0C8H.1
RXOVRN BIT 0F8H.4
TMR2L DATA 0CCH
ACKRQ BIT 0C0H.3
USB0ADR DATA 096H
TMR3L DATA 094H
F0 BIT 0D0H.5
FLSCL DATA 0B6H
USB0DAT DATA 097H
AD0CM0 BIT 0E8H.0
F1 BIT 0D0H.1
STO BIT 0C0H.4
AD0CM1 BIT 0E8H.1
SPI0DAT DATA 0A3H
AD0CM2 BIT 0E8H.2
AD0WINT BIT 0E8H.3
AD0BUSY BIT 0E8H.4
PSW DATA 0D0H
CCF0 BIT 0D8H.0
RB80 BIT 098H.2
FLKEY DATA 0B7H
CCF1 BIT 0D8H.1
?PR?UART0_Init?F34X_MSD_UART SEGMENT CODE
?XD?UART0_Init?F34X_MSD_UART SEGMENT XDATA OVERLAYABLE
?PR?key_available?F34X_MSD_UART SEGMENT CODE
?CO?F34X_MSD_UART SEGMENT CODE
EXTRN CODE (_printf)
EXTRN XDATA (?_printf?BYTE)
PUBLIC key_available
PUBLIC UART0_Init
RSEG ?XD?UART0_Init?F34X_MSD_UART
?UART0_Init?BYTE:
sbrl?040: DS 2
RSEG ?CO?F34X_MSD_UART
?SC_0:
DB 'U' ,'A' ,'R' ,'T' ,' ' ,'I' ,'N' ,'I' ,'T' ,00DH
DB 00AH,000H
; //-----------------------------------------------------------------------------
; // F34x_MSD_UART.c
; //-----------------------------------------------------------------------------
; // Copyright 2006 Silicon Laboratories, Inc.
; // http://www.silabs.com
; //
; // Program Description:
; //
; // File contains initialization functions for UART interface.
; //
; //
; //
; // How To Test: See Readme.txt
; //
; //
; // FID: 34X000057
; // Target: C8051F34x
; // Tool chain: Keil
; // Command Line: See Readme.txt
; // Project Name: F34x_USB_MSD
; //
; // Release 1.1
; // -All changes by PKC
; // -09 JUN 2006
; // -Replaced SFR definitions file "c8051f320.h" with "c8051f340.h"
; //
; // Release 1.0
; // -Initial Release
; //
;
; //-----------------------------------------------------------------------------
; // Includes
; //-----------------------------------------------------------------------------
;
; #include "F34x_MSD_Definitions.h"
; #include "F34x_MSD_UART.h"
; #include "c8051f340.h"
; #include "F34x_MSD_Put_Char.h"
; #include <stdio.h>
;
; #ifdef __F340_VER__
; #ifdef F340_24M
; #define START_SYSCLK 24000000
; #else
; #define START_SYSCLK 48000000
; #endif
; //#define START_SYSCLK 12000000
; #else
; #ifdef __F326_VER__
; #define START_SYSCLK 24000000
; #else
; #define START_SYSCLK 12000000
; #endif
; #endif
; #define SYSCLK START_SYSCLK /** 2*/ // SYSCLK frequency in Hz
;
; #define BAUDRATE 115200 // Baud rate of UART in bps
;
; #define USBCLK 48000000
;
;
; //----------------------------------------------------------------------------
; // UART0_Init
; //----------------------------------------------------------------------------
; //
; // This function initializes UART 0 interface.
; //
; // Parameters :
; // Return Value :
; //----------------------------------------------------------------------------
;
; void UART0_Init(void) {
RSEG ?PR?UART0_Init?F34X_MSD_UART
UART0_Init:
USING 0
; SOURCE LINE # 72
; int xdata sbrl ;
; sbrl = (0xFFFF - (SYSCLK/BAUDRATE/2)) + 1;
; SOURCE LINE # 74
MOV DPTR,#sbrl?040
MOV A,#0FFH
MOVX @DPTR,A
INC DPTR
MOV A,#0CCH
MOVX @DPTR,A
; SCON0 = 0x10; // SCON0: 8-bit variable bit rate
; SOURCE LINE # 75
MOV SCON0,#010H
; // level of STOP bit is ignored
; // RX enabled
; // ninth bits are zeros
; // clear RI0 and TI0 bits
;
; #ifdef __F326_VER__
; SMOD0 = 0x0c;
;
; SBRLH0 = (sbrl & 0xFF00) >> 8;
; SBRLL0 = sbrl & 0x00ff;
;
; SBCON0 = 0x43;
;
; // ES0 = 1;
; // PS0 = 1;
; TI0 = 1;
; #else
; if (SYSCLK/BAUDRATE/2/256 < 1)
; SOURCE LINE # 93
; {
; SOURCE LINE # 94
; TH1 = -(SYSCLK/BAUDRATE/2);
; SOURCE LINE # 95
MOV TH1,A
; CKCON |= 0x08; // T1M = 1; SCA1:0 = xx
; SOURCE LINE # 96
ORL CKCON,#08H
; }
; SOURCE LINE # 97
; else if (SYSCLK/BAUDRATE/2/256 < 4)
; SOURCE LINE # 98
; {
; SOURCE LINE # 99
; TH1 = -(SYSCLK/BAUDRATE/2/4);
; SOURCE LINE # 100
; CKCON &= ~0x0B;
; SOURCE LINE # 101
; CKCON |= 0x01; // T1M = 0; SCA1:0 = 01
; SOURCE LINE # 102
; }
; SOURCE LINE # 103
; else if (SYSCLK/BAUDRATE/2/256 < 12)
; SOURCE LINE # 104
; {
; SOURCE LINE # 105
; TH1 = -(SYSCLK/BAUDRATE/2/12);
; SOURCE LINE # 106
; CKCON &= ~0x0B; // T1M = 0; SCA1:0 = 00
; SOURCE LINE # 107
; }
; SOURCE LINE # 108
; else
; {
; SOURCE LINE # 110
; TH1 = -(SYSCLK/BAUDRATE/2/48);
; SOURCE LINE # 111
; CKCON &= ~0x0B; // T1M = 0; SCA1:0 = 10
; SOURCE LINE # 112
; CKCON |= 0x02;
; SOURCE LINE # 113
; }
; SOURCE LINE # 114
?C0002:
;
; TL1 = TH1; // init Timer1
; SOURCE LINE # 116
MOV TL1,TH1
; TMOD &= ~0xf0; // TMOD: timer 1 in 8-bit autoreload
; SOURCE LINE # 117
ANL TMOD,#0FH
; TMOD |= 0x20;
; SOURCE LINE # 118
ORL TMOD,#020H
; TR1 = 1; // START Timer1
; SOURCE LINE # 119
SETB TR1
; TI0 = 1; // Indicate TX0 ready
; SOURCE LINE # 120
SETB TI0
; #endif
; printf("UART INIT"ENDLINE);
; SOURCE LINE # 122
MOV R3,#0FFH
MOV R2,#HIGH (?SC_0)
MOV R1,#LOW (?SC_0)
LJMP _printf
; END OF UART0_Init
; }
;
; //----------------------------------------------------------------------------
; // key_available
; //----------------------------------------------------------------------------
; //
; // Function returns state of UART receive interrupt flag "RI0"
; //
; // Parameters :
; // Return Value : TRUE if RI0 flag is set and FALSE if not.
; //----------------------------------------------------------------------------
;
; unsigned char key_available() {
RSEG ?PR?key_available?F34X_MSD_UART
key_available:
USING 0
; SOURCE LINE # 135
; return RI0?1:0;
; SOURCE LINE # 136
JNB RI0,?C0008
MOV R7,#01H
SJMP ?C0009
?C0008:
MOV R7,#00H
?C0009:
; }
; SOURCE LINE # 137
?C0010:
RET
; END OF key_available
END
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