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📄 f34x_msd_usb_isr.lst

📁 USB读写SD卡例程
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 147      =1  sfr  SPI0CN       =  0xF8;             // SPI0 Control
 148      =1  sfr  PCA0L        =  0xF9;             // PCA0 Counter Low
 149      =1  sfr  PCA0H        =  0xFA;             // PCA0 Counter High
 150      =1  sfr  PCA0CPL0     =  0xFB;             // PCA0 Capture 0 Low
 151      =1  sfr  PCA0CPH0     =  0xFC;             // PCA0 Capture 0 High
 152      =1  sfr  PCA0CPL4     =  0xFD;             // PCA0 Capture 4 Low
 153      =1  sfr  PCA0CPH4     =  0xFE;             // PCA0 Capture 4 High
 154      =1  sfr  VDM0CN       =  0xFF;             // VDD Monitor Control
 155      =1  
 156      =1  
 157      =1  //----------------------------------------------------------------
             --------------
 158      =1  // Bit Definitions
 159      =1  //----------------------------------------------------------------
             --------------
 160      =1  
 161      =1  // TCON 0x88
 162      =1  sbit TF1     = 0x8F;                   // Timer1 overflow flag
 163      =1  sbit TR1     = 0x8E;                   // Timer1 on/off control
 164      =1  sbit TF0     = 0x8D;                   // Timer0 overflow flag
 165      =1  sbit TR0     = 0x8C;                   // Timer0 on/off control
 166      =1  sbit IE1     = 0x8B;                   // Ext interrupt 1 edge fla
             -g
 167      =1  sbit IT1     = 0x8A;                   // Ext interrupt 1 type
 168      =1  sbit IE0     = 0x89;                   // Ext interrupt 0 edge fla
             -g
 169      =1  sbit IT0     = 0x88;                   // Ext interrupt 0 type
 170      =1  
 171      =1  // SCON0 0x98
 172      =1  sbit S0MODE  = 0x9F;                   // Serial mode control bit 
             -0
 173      =1                                         // Bit6 UNUSED
 174      =1  sbit MCE0    = 0x9D;                   // Multiprocessor communica
             -tion enable
 175      =1  sbit REN0    = 0x9C;                   // Receive enable
 176      =1  sbit TB80    = 0x9B;                   // Transmit bit 8
 177      =1  sbit RB80    = 0x9A;                   // Receive bit 8
 178      =1  sbit TI0     = 0x99;                   // Transmit interrupt flag
 179      =1  sbit RI0     = 0x98;                   // Receive interrupt flag
 180      =1  
 181      =1  // IE 0xA8
 182      =1  sbit EA      = 0xAF;                   // Global interrupt enable
 183      =1  sbit ESPI0   = 0xAE;                   // SPI0 interrupt enable
 184      =1  sbit ET2     = 0xAD;                   // Timer2 interrupt enable
 185      =1  sbit ES0     = 0xAC;                   // UART0 interrupt enable
 186      =1  sbit ET1     = 0xAB;                   // Timer1 interrupt enable
 187      =1  sbit EX1     = 0xAA;                   // External interrupt 1 ena
             -ble
 188      =1  sbit ET0     = 0xA9;                   // Timer0 interrupt enable
 189      =1  sbit EX0     = 0xA8;                   // External interrupt 0 ena
             -ble
 190      =1  
 191      =1  // IP 0xB8
 192      =1                                         // Bit7 UNUSED
 193      =1  sbit PSPI0   = 0xBE;                   // SPI0 interrupt priority
 194      =1  sbit PT2     = 0xBD;                   // Timer2 priority
 195      =1  sbit PS0     = 0xBC;                   // UART0 priority
 196      =1  sbit PT1     = 0xBB;                   // Timer1 priority
C51 COMPILER V7.50   F34X_MSD_USB_ISR              11/28/2006 10:54:34 PAGE 6   

 197      =1  sbit PX1     = 0xBA;                   // External interrupt 1 pri
             -ority
 198      =1  sbit PT0     = 0xB9;                   // Timer0 priority
 199      =1  sbit PX0     = 0xB8;                   // External interrupt 0 pri
             -ority
 200      =1  
 201      =1  // SMB0CN 0xC0
 202      =1  sbit MASTER  = 0xC7;                   // Master/slave indicator
 203      =1  sbit TXMODE  = 0xC6;                   // Transmit mode indicator
 204      =1  sbit STA     = 0xC5;                   // Start flag
 205      =1  sbit STO     = 0xC4;                   // Stop flag
 206      =1  sbit ACKRQ   = 0xC3;                   // Acknowledge request
 207      =1  sbit ARBLOST = 0xC2;                   // Arbitration lost indicat
             -or
 208      =1  sbit ACK     = 0xC1;                   // Acknowledge flag
 209      =1  sbit SI      = 0xC0;                   // SMBus interrupt flag
 210      =1  
 211      =1  // TMR2CN 0xC8
 212      =1  sbit TF2H    = 0xCF;                   // Timer2 high byte overflo
             -w flag
 213      =1  sbit TF2L    = 0xCE;                   // Timer2 low byte overflow
             - flag
 214      =1  sbit TF2LEN  = 0xCD;                   // Timer2 low byte interrup
             -t enable
 215      =1  sbit T2CE    = 0xCC;                   // Timer2 capture enable
 216      =1  sbit T2SPLIT = 0xCB;                   // Timer2 split mode enable
 217      =1  sbit TR2     = 0xCA;                   // Timer2 on/off control
 218      =1  sbit T2CSS   = 0xC9;                   // Timer 2 Capture Source s
             -elect
 219      =1  sbit T2XCLK  = 0xC8;                   // Timer2 external clock se
             -lect
 220      =1  
 221      =1  // PSW 0xD0
 222      =1  sbit CY      = 0xD7;                   // Carry flag
 223      =1  sbit AC      = 0xD6;                   // Auxiliary carry flag
 224      =1  sbit F0      = 0xD5;                   // User flag 0
 225      =1  sbit RS1     = 0xD4;                   // Register bank select 1
 226      =1  sbit RS0     = 0xD3;                   // Register bank select 0
 227      =1  sbit OV      = 0xD2;                   // Overflow flag
 228      =1  sbit F1      = 0xD1;                   // User flag 1
 229      =1  sbit P       = 0xD0;                   // Accumulator parity flag
 230      =1  
 231      =1  // PCA0CN 0xD8
 232      =1  sbit CF      = 0xDF;                   // PCA0 counter overflow fl
             -ag
 233      =1  sbit CR      = 0xDE;                   // PCA0 counter run control
 234      =1                                         // Bit5 UNUSED
 235      =1  sbit CCF4    = 0xDC;                   // PCA0 module4 capture/com
             -pare flag
 236      =1  sbit CCF3    = 0xDB;                   // PCA0 module3 capture/com
             -pare flag
 237      =1  sbit CCF2    = 0xDA;                   // PCA0 module2 capture/com
             -pare flag
 238      =1  sbit CCF1    = 0xD9;                   // PCA0 module1 capture/com
             -pare flag
 239      =1  sbit CCF0    = 0xD8;                   // PCA0 module0 capture/com
             -pare flag
 240      =1  
 241      =1  // ADC0CN 0xE8
 242      =1  sbit AD0EN   = 0xEF;                   // ADC0 enable
 243      =1  sbit AD0TM   = 0xEE;                   // ADC0 track mode
 244      =1  sbit AD0INT  = 0xED;                   // ADC0 conversion complete
C51 COMPILER V7.50   F34X_MSD_USB_ISR              11/28/2006 10:54:34 PAGE 7   

             - interrupt flag
 245      =1  sbit AD0BUSY = 0xEC;                   // ADC0 busy flag
 246      =1  sbit AD0WINT = 0xEB;                   // ADC0 window compare inte
             -rrupt flag
 247      =1  sbit AD0CM2  = 0xEA;                   // ADC0 conversion mode sel
             -ect 2
 248      =1  sbit AD0CM1  = 0xE9;                   // ADC0 conversion mode sel
             -ect 1
 249      =1  sbit AD0CM0  = 0xE8;                   // ADC0 conversion mode sel
             -ect 0
 250      =1  
 251      =1  // SPI0CN 0xF8
 252      =1  sbit SPIF    = 0xFF;                   // SPI0 interrupt flag
 253      =1  sbit WCOL    = 0xFE;                   // SPI0 write collision fla
             -g
 254      =1  sbit MODF    = 0xFD;                   // SPI0 mode fault flag
 255      =1  sbit RXOVRN  = 0xFC;                   // SPI0 rx overrun flag
 256      =1  sbit NSSMD1  = 0xFB;                   // SPI0 slave select mode 1
 257      =1  sbit NSSMD0  = 0xFA;                   // SPI0 slave select mode 0
 258      =1  sbit TXBMT   = 0xF9;                   // SPI0 transmit buffer emp
             -ty
 259      =1  sbit SPIEN   = 0xF8;                   // SPI0 SPI enable
 260      =1  
 261      =1  
 262      =1  //----------------------------------------------------------------
             --------------
 263      =1  // Interrupt Priorities
 264      =1  //----------------------------------------------------------------
             --------------
 265      =1  
 266      =1  #define INTERRUPT_INT0             0   // External Interrupt 0
 267      =1  #define INTERRUPT_TIMER0           1   // Timer0 Overflow
 268      =1  #define INTERRUPT_INT1             2   // External Interrupt 1
 269      =1  #define INTERRUPT_TIMER1           3   // Timer1 Overflow
 270      =1  #define INTERRUPT_UART0            4   // Serial Port 0
 271      =1  #define INTERRUPT_TIMER2           5   // Timer2 Overflow
 272      =1  #define INTERRUPT_SPI0             6   // Serial Peripheral Interf
             -ace 0
 273      =1  #define INTERRUPT_SMBUS0           7   // SMBus0 Interface
 274      =1  #define INTERRUPT_USB0             8   // USB Interface
 275      =1  #define INTERRUPT_ADC0_WINDOW      9   // ADC0 Window Comparison
 276      =1  #define INTERRUPT_ADC0_EOC         10  // ADC0 End Of Conversion
 277      =1  #define INTERRUPT_PCA0             11  // PCA0 Peripheral
 278      =1  #define INTERRUPT_COMPARATOR0      12  // Comparator0
 279      =1  #define INTERRUPT_COMPARATOR1      13  // Comparator1
 280      =1  #define INTERRUPT_TIMER3           14  // Timer3 Overflow
 281      =1  #define INTERRUPT_VBUS_LEVEL       15  // VBUS level-triggered int
             -errupt
 282      =1  #define INTERRUPT_UART1            16  // Serial Port 1
 283      =1  
 284      =1  //----------------------------------------------------------------
             --------------
 285      =1  // Header File PreProcessor Directive
 286      =1  //----------------------------------------------------------------
             --------------
 287      =1  
 288      =1  #endif                                 // #define C8051F340_H
 289      =1  
 290      =1  //----------------------------------------------------------------
             --------------
 291      =1  // End Of File
 292      =1  //----------------------------------------------------------------
C51 COMPILER V7.50   F34X_MSD_USB_ISR              11/28/2006 10:54:34 PAGE 8   

             --------------
  36          #include "F34x_MSD_USB_Register.h"
   1      =1  //----------------------------------------------------------------
             --------------
   2      =1  // F34x_MSD_USB_Register.h
   3      =1  //----------------------------------------------------------------
             --------------
   4      =1  // Copyright 2006 Silicon Laboratories, Inc.
   5      =1  // http://www.silabs.com
   6      =1  //
   7      =1  // Program Description:
   8      =1  //
   9      =1  // Header file for USB firmware. Includes all USB core register
  10      =1  // addresses, register access macros, and register bit masks.
  11      =1  //
  12      =1  // FID:            34X000065
  13      =1  // Target:         C8051F34x
  14      =1  // Tool chain:     Keil
  15      =1  // Command Line:   See Readme.txt
  16      =1  // Project Name:   F34x_USB_MSD
  17      =1  //
  18      =1  // Release 1.1
  19      =1  //    -All changes by PKC
  20      =1  //    -09 JUN 2006
  21      =1  //    -No changes; incremented revision number to match project re
             -vision
  22      =1  //
  23      =1  // Release 1.0
  24      =1  //    -Initial Release
  25      =1  //
  26      =1  // 11/22/02 - DM: 1. Updated function prototypes and added constan
             -ts
  27      =1  //                to F34x_USB_Main.h with sample interrupt firmwar
             -e.
  28      =1  
  29      =1  //----------------------------------------------------------------
             --------------
  30      =1  // Header File Preprocessor Directive
  31      =1  //----------------------------------------------------------------
             --------------
  32      =1  
  33      =1  #ifndef  _USB_REGS_H_
  34      =1  #define  _USB_REGS_H_
  35      =1  
  36      =1  #include "F34x_MSD_Definitions.h"
   1      =2  //----------------------------------------------------------------
             --------------
   2      =2  // F34x_MSD_Definitions.h
   3      =2  //----------------------------------------------------------------
             --------------
   4      =2  // Copyright 2006 Silicon Laboratories, Inc.
   5      =2  // http://www.silabs.com
   6      =2  //
   7      =2  // Program Description:
   8      =2  //
   9      =2  // Header file with all definitions.
  10      =2  //
  11      =2  //
  12      =2  // FID:            34X000032
  13      =2  // Target:         C8051F34x
  14      =2  // Tool chain:     Keil
  15      =2  // Command Line:   See Readme.txt
C51 COMPILER V7.50   F34X_MSD_USB_ISR              11/28/2006 10:54:34 PAGE 9   

  16      =2  // Project Name:   F34x_USB_MSD
  17      =2  //
  18      =2  // Release 1.1
  19      =2  //    -All changes by PKC
  20      =2  //    -09 JUN 2006
  21      =2  //    -Replaced SFR definitions file "c8051f320.h" with "c8051f340
             -.h"
  22      =2  //
  23      =2  // Release 1.0
  24      =2  //    -Initial Release

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