📄 f34x_msd_dir_commands.lst
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4 =1 // Copyright 2006 Silicon Laboratories, Inc.
5 =1 // http://www.silabs.com
6 =1 //
7 =1 // Program Description:
8 =1 //
9 =1 // Header file with function prototypes relevant to F34x_File_Syst
-em..c
10 =1 //
11 =1 //
12 =1 // FID: 34X000036
13 =1 // Target: C8051F34x
14 =1 // Tool chain: Keil
15 =1 // Command Line: See Readme.txt
16 =1 // Project Name: F34x_USB_MSD
17 =1 //
18 =1 // Release 1.1
19 =1 // -All changes by PKC
20 =1 // -09 JUN 2006
21 =1 // -No changes; incremented revision number to match project re
-vision
22 =1 //
23 =1 // Release 1.0
24 =1 // -Initial Release
25 =1 //
26 =1
27 =1 //----------------------------------------------------------------
--------------
28 =1 // Header File Preprocessor Directive
29 =1 //----------------------------------------------------------------
--------------
30 =1
31 =1 #ifndef _FILESYS_H_
32 =1 #define _FILESYS_H_
33 =1
34 =1 #include "F34x_MSD_USB_Main.h"
1 =2 //----------------------------------------------------------------
--------------
2 =2 // F34x_MSD_USB_Main.h
3 =2 //----------------------------------------------------------------
--------------
4 =2 // Copyright 2006 Silicon Laboratories, Inc.
5 =2 // http://www.silabs.com
6 =2 //
7 =2 // Program Description:
C51 COMPILER V7.50 F34X_MSD_DIR_COMMANDS 11/28/2006 10:54:04 PAGE 6
8 =2 //
9 =2 // Main header file for USB firmware. Includes function prototypes
-,
10 =2 // standard constants, and configuration constants.//
11 =2 //
12 =2 // FID: 34X000063
13 =2 // Target: C8051F34x
14 =2 // Tool chain: Keil
15 =2 // Command Line: See Readme.txt
16 =2 // Project Name: F34x_USB_MSD
17 =2 //
18 =2 // Release 1.1
19 =2 // -All changes by PKC
20 =2 // -09 JUN 2006
21 =2 // -No changes; incremented revision number to match project re
-vision
22 =2 //
23 =2 // Release 1.0
24 =2 // -Initial Release
25 =2 //
26 =2 // 11/22/02 - DM: 1. Updated function prototypes and added constan
-ts
27 =2 // to F34x_USB_Main.h with sample interrupt firmwar
-e.
28 =2
29 =2 //----------------------------------------------------------------
--------------
30 =2 // Header File Preprocessor Directive
31 =2 //----------------------------------------------------------------
--------------
32 =2
33 =2 #ifndef _USB_MAIN_H_
34 =2 #define _USB_MAIN_H_
35 =2
36 =2 #include "F34x_MSD_Definitions.h"
1 =3 //----------------------------------------------------------------
--------------
2 =3 // F34x_MSD_Definitions.h
3 =3 //----------------------------------------------------------------
--------------
4 =3 // Copyright 2006 Silicon Laboratories, Inc.
5 =3 // http://www.silabs.com
6 =3 //
7 =3 // Program Description:
8 =3 //
9 =3 // Header file with all definitions.
10 =3 //
11 =3 //
12 =3 // FID: 34X000032
13 =3 // Target: C8051F34x
14 =3 // Tool chain: Keil
15 =3 // Command Line: See Readme.txt
16 =3 // Project Name: F34x_USB_MSD
17 =3 //
18 =3 // Release 1.1
19 =3 // -All changes by PKC
20 =3 // -09 JUN 2006
21 =3 // -Replaced SFR definitions file "c8051f320.h" with "c8051f340
-.h"
22 =3 //
23 =3 // Release 1.0
24 =3 // -Initial Release
C51 COMPILER V7.50 F34X_MSD_DIR_COMMANDS 11/28/2006 10:54:04 PAGE 7
25 =3 //
26 =3
27 =3 //----------------------------------------------------------------
--------------
28 =3 // Header File Preprocessor Directive
29 =3 //----------------------------------------------------------------
--------------
30 =3
31 =3 #ifndef __DEFINITIONS_H__
32 =3 #define __DEFINITIONS_H__
33 =3
34 =3 #define DEBUG_TIMEOUTS
35 =3 #include "c8051f340.h"
1 =4 //----------------------------------------------------------------
--------------
2 =4 // C8051F340.h
3 =4 //----------------------------------------------------------------
--------------
4 =4 // Copyright 2005 Silicon Laboratories, Inc.
5 =4 // http://www.silabs.com
6 =4 //
7 =4 // Program Description:
8 =4 //
9 =4 // Register/bit definitions for the C8051F34x family.
10 =4 //
11 =4 //
12 =4 // FID: 34X000002
13 =4 // Target: C8051F340, 'F341, 'F342, 'F343, 'F344, 'F345, '
-F346, 'F347
14 =4 // Tool chain: Keil
15 =4 // Command Line: None
16 =4 //
17 =4 // Release 1.0
18 =4 // -Initial Release (GP\PKC)
19 =4 // -13 DEC 2005
20 =4
21 =4 //----------------------------------------------------------------
--------------
22 =4 // Header File Preprocessor Directive
23 =4 //----------------------------------------------------------------
--------------
24 =4
25 =4 #ifndef C8051F340_H
26 =4 #define C8051F340_H
27 =4
28 =4 //----------------------------------------------------------------
--------------
29 =4 // Byte Registers
30 =4 //----------------------------------------------------------------
--------------
31 =4
32 =4 sfr P0 = 0x80; // Port 0 Latch
33 =4 sfr SP = 0x81; // Stack Pointer
34 =4 sfr DPL = 0x82; // Data Pointer Low
35 =4 sfr DPH = 0x83; // Data Pointer High
36 =4 sfr EMI0TC = 0x84; // EMIF Timing
37 =4 sfr EMI0CF = 0x85; // EMIF Configuration
38 =4 sfr OSCLCN = 0x86; // Internal Low-Freq Oscill
-ator Control
39 =4 sfr PCON = 0x87; // Power Control
40 =4 sfr TCON = 0x88; // Timer/Counter Control
41 =4 sfr TMOD = 0x89; // Timer/Counter Mode
C51 COMPILER V7.50 F34X_MSD_DIR_COMMANDS 11/28/2006 10:54:04 PAGE 8
42 =4 sfr TL0 = 0x8A; // Timer/Counter 0 Low
43 =4 sfr TL1 = 0x8B; // Timer/Counter 1 Low
44 =4 sfr TH0 = 0x8C; // Timer/Counter 0 High
45 =4 sfr TH1 = 0x8D; // Timer/Counter 1 High
46 =4 sfr CKCON = 0x8E; // Clock Control
47 =4 sfr PSCTL = 0x8F; // Program Store R/W Contro
-l
48 =4 sfr P1 = 0x90; // Port 1 Latch
49 =4 sfr TMR3CN = 0x91; // Timer/Counter 3Control
50 =4 sfr TMR3RLL = 0x92; // Timer/Counter 3 Reload L
-ow
51 =4 sfr TMR3RLH = 0x93; // Timer/Counter 3 Reload H
-igh
52 =4 sfr TMR3L = 0x94; // Timer/Counter 3Low
53 =4 sfr TMR3H = 0x95; // Timer/Counter 3 High
54 =4 sfr USB0ADR = 0x96; // USB0 Indirect Address Re
-gister
55 =4 sfr USB0DAT = 0x97; // USB0 Data Register
56 =4 sfr SCON0 = 0x98; // UART0 Control
57 =4 sfr SBUF0 = 0x99; // UART0 Data Buffer
58 =4 sfr CPT1CN = 0x9A; // Comparator1 Control
59 =4 sfr CPT0CN = 0x9B; // Comparator0 Control
60 =4 sfr CPT1MD = 0x9C; // Comparator1 Mode Selecti
-on
61 =4 sfr CPT0MD = 0x9D; // Comparator0 Mode Selecti
-on
62 =4 sfr CPT1MX = 0x9E; // Comparator1 MUX Selectio
-n
63 =4 sfr CPT0MX = 0x9F; // Comparator0 MUX Selectio
-n
64 =4 sfr P2 = 0xA0; // Port 2 Latch
65 =4 sfr SPI0CFG = 0xA1; // SPI Configuration
66 =4 sfr SPI0CKR = 0xA2; // SPI Clock Rate Control
67 =4 sfr SPI0DAT = 0xA3; // SPI Data
68 =4 sfr P0MDOUT = 0xA4; // Port 0 Output Mode Confi
-guration
69 =4 sfr P1MDOUT = 0xA5; // Port 1 Output Mode Confi
-guration
70 =4 sfr P2MDOUT = 0xA6; // Port 2 Output Mode Confi
-guration
71 =4 sfr P3MDOUT = 0xA7; // Port 3 Output Mode Confi
-guration
72 =4 sfr IE = 0xA8; // Interrupt Enable
73 =4 sfr CLKSEL = 0xA9; // Clock Select
74 =4 sfr EMI0CN = 0xAA; // External Memory Interfac
-e Control
75 =4 sfr SBCON1 = 0xAC; // UART1 Baud Rate Generato
-r Control
76 =4 sfr P4MDOUT = 0xAE; // Port 4 Output Mode Confi
-guration
77 =4 sfr PFE0CN = 0xAF; // Prefetch Engine Control
78 =4 sfr P3 = 0xB0; // Port 3 Latch
79 =4 sfr OSCXCN = 0xB1; // External Oscillator Cont
-rol
80 =4 sfr OSCICN = 0xB2; // Internal Oscillator Cont
-rol
81 =4 sfr OSCICL = 0xB3; // Internal Oscillator Cali
-bration
82 =4 sfr SBRLL1 = 0xB4; // UART1 Baud Rate Generato
-r Low
83 =4 sfr SBRLH1 = 0xB5; // UART1 Baud Rate Generato
-r High
C51 COMPILER V7.50 F34X_MSD_DIR_COMMANDS 11/28/2006 10:54:04 PAGE 9
84 =4 sfr FLSCL = 0xB6; // Flash Scale
85 =4 sfr FLKEY = 0xB7; // Flash Lock and Key
86 =4 sfr IP = 0xB8; // Interrupt Priority
87 =4 sfr CLKMUL = 0xB9; // Clock Multiplier
88 =4 sfr AMX0N = 0xBA; // AMUX0 Negative Channel S
-elect
89 =4 sfr AMX0P = 0xBB; // AMUX0 Positive Channel S
-elect
90 =4 sfr ADC0CF = 0xBC; // ADC0 Configuration
91 =4 sfr ADC0L = 0xBD; // ADC0 Low
92 =4 sfr ADC0H = 0xBE; // ADC0 High
93 =4 sfr SMB0CN = 0xC0; // SMBus Control
94 =4 sfr SMB0CF = 0xC1; // SMBus Configuration
95 =4 sfr SMB0DAT = 0xC2; // SMBus Data
96 =4 sfr ADC0GTL = 0xC3; // ADC0 Greater-Than Compar
-e Low
97 =4 sfr ADC0GTH = 0xC4; // ADC0 Greater-Than Compar
-e High
98 =4 sfr ADC0LTL = 0xC5; // ADC0 Less-Than Compare W
-ord Low
99 =4 sfr ADC0LTH = 0xC6; // ADC0 Less-Than Compare W
-ord High
100 =4 sfr P4 = 0xC7; // Port 4 Latch
101 =4 sfr TMR2CN = 0xC8; // Timer/Counter 2 Control
102 =4 sfr REG0CN = 0xC9; // Voltage Regulator Contro
-l
103 =4 sfr TMR2RLL = 0xCA; // Timer/Counter 2 Reload L
-ow
104 =4 sfr TMR2RLH = 0xCB; // Timer/Counter 2 Reload H
-igh
105 =4 sfr TMR2L = 0xCC; // Timer/Counter 2 Low
106 =4 sfr TMR2H = 0xCD; // Timer/Counter 2 High
107 =4 sfr PSW = 0xD0; // Program Status Word
108 =4 sfr REF0CN = 0xD1; // Voltage Reference Contro
-l
109 =4 sfr SCON1 = 0xD2; // UART1 Control
110 =4 sfr SBUF1 = 0xD3; // UART1 Data Buffer
111 =4 sfr P0SKIP = 0xD4; // Port 0 Skip
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