📄 f34x_msd_sect_serv.lst
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=3 //----------------------------------------------------------------
--------------
=3
=3 sfr P0 = 0x80; // Port 0 Latch
=3 sfr SP = 0x81; // Stack Pointer
=3 sfr DPL = 0x82; // Data Pointer Low
=3 sfr DPH = 0x83; // Data Pointer High
=3 sfr EMI0TC = 0x84; // EMIF Timing
=3 sfr EMI0CF = 0x85; // EMIF Configuration
=3 sfr OSCLCN = 0x86; // Internal Low-Freq Oscill
-ator Control
=3 sfr PCON = 0x87; // Power Control
=3 sfr TCON = 0x88; // Timer/Counter Control
=3 sfr TMOD = 0x89; // Timer/Counter Mode
=3 sfr TL0 = 0x8A; // Timer/Counter 0 Low
=3 sfr TL1 = 0x8B; // Timer/Counter 1 Low
=3 sfr TH0 = 0x8C; // Timer/Counter 0 High
=3 sfr TH1 = 0x8D; // Timer/Counter 1 High
=3 sfr CKCON = 0x8E; // Clock Control
=3 sfr PSCTL = 0x8F; // Program Store R/W Contro
-l
=3 sfr P1 = 0x90; // Port 1 Latch
=3 sfr TMR3CN = 0x91; // Timer/Counter 3Control
=3 sfr TMR3RLL = 0x92; // Timer/Counter 3 Reload L
-ow
=3 sfr TMR3RLH = 0x93; // Timer/Counter 3 Reload H
-igh
=3 sfr TMR3L = 0x94; // Timer/Counter 3Low
=3 sfr TMR3H = 0x95; // Timer/Counter 3 High
=3 sfr USB0ADR = 0x96; // USB0 Indirect Address Re
-gister
=3 sfr USB0DAT = 0x97; // USB0 Data Register
=3 sfr SCON0 = 0x98; // UART0 Control
=3 sfr SBUF0 = 0x99; // UART0 Data Buffer
=3 sfr CPT1CN = 0x9A; // Comparator1 Control
=3 sfr CPT0CN = 0x9B; // Comparator0 Control
=3 sfr CPT1MD = 0x9C; // Comparator1 Mode Selecti
-on
=3 sfr CPT0MD = 0x9D; // Comparator0 Mode Selecti
-on
=3 sfr CPT1MX = 0x9E; // Comparator1 MUX Selectio
-n
=3 sfr CPT0MX = 0x9F; // Comparator0 MUX Selectio
-n
=3 sfr P2 = 0xA0; // Port 2 Latch
=3 sfr SPI0CFG = 0xA1; // SPI Configuration
=3 sfr SPI0CKR = 0xA2; // SPI Clock Rate Control
=3 sfr SPI0DAT = 0xA3; // SPI Data
=3 sfr P0MDOUT = 0xA4; // Port 0 Output Mode Confi
-guration
=3 sfr P1MDOUT = 0xA5; // Port 1 Output Mode Confi
-guration
=3 sfr P2MDOUT = 0xA6; // Port 2 Output Mode Confi
-guration
=3 sfr P3MDOUT = 0xA7; // Port 3 Output Mode Confi
-guration
=3 sfr IE = 0xA8; // Interrupt Enable
=3 sfr CLKSEL = 0xA9; // Clock Select
=3 sfr EMI0CN = 0xAA; // External Memory Interfac
-e Control
C51 COMPILER V7.50 F34X_MSD_SECT_SERV 11/28/2006 10:54:26 PAGE 18
=3 sfr SBCON1 = 0xAC; // UART1 Baud Rate Generato
-r Control
=3 sfr P4MDOUT = 0xAE; // Port 4 Output Mode Confi
-guration
=3 sfr PFE0CN = 0xAF; // Prefetch Engine Control
=3 sfr P3 = 0xB0; // Port 3 Latch
=3 sfr OSCXCN = 0xB1; // External Oscillator Cont
-rol
=3 sfr OSCICN = 0xB2; // Internal Oscillator Cont
-rol
=3 sfr OSCICL = 0xB3; // Internal Oscillator Cali
-bration
=3 sfr SBRLL1 = 0xB4; // UART1 Baud Rate Generato
-r Low
=3 sfr SBRLH1 = 0xB5; // UART1 Baud Rate Generato
-r High
=3 sfr FLSCL = 0xB6; // Flash Scale
=3 sfr FLKEY = 0xB7; // Flash Lock and Key
=3 sfr IP = 0xB8; // Interrupt Priority
=3 sfr CLKMUL = 0xB9; // Clock Multiplier
=3 sfr AMX0N = 0xBA; // AMUX0 Negative Channel S
-elect
=3 sfr AMX0P = 0xBB; // AMUX0 Positive Channel S
-elect
=3 sfr ADC0CF = 0xBC; // ADC0 Configuration
=3 sfr ADC0L = 0xBD; // ADC0 Low
=3 sfr ADC0H = 0xBE; // ADC0 High
=3 sfr SMB0CN = 0xC0; // SMBus Control
=3 sfr SMB0CF = 0xC1; // SMBus Configuration
=3 sfr SMB0DAT = 0xC2; // SMBus Data
=3 sfr ADC0GTL = 0xC3; // ADC0 Greater-Than Compar
-e Low
=3 sfr ADC0GTH = 0xC4; // ADC0 Greater-Than Compar
-e High
=3 sfr ADC0LTL = 0xC5; // ADC0 Less-Than Compare W
-ord Low
=3 sfr ADC0LTH = 0xC6; // ADC0 Less-Than Compare W
-ord High
=3 sfr P4 = 0xC7; // Port 4 Latch
=3 sfr TMR2CN = 0xC8; // Timer/Counter 2 Control
=3 sfr REG0CN = 0xC9; // Voltage Regulator Contro
-l
=3 sfr TMR2RLL = 0xCA; // Timer/Counter 2 Reload L
-ow
=3 sfr TMR2RLH = 0xCB; // Timer/Counter 2 Reload H
-igh
=3 sfr TMR2L = 0xCC; // Timer/Counter 2 Low
=3 sfr TMR2H = 0xCD; // Timer/Counter 2 High
=3 sfr PSW = 0xD0; // Program Status Word
=3 sfr REF0CN = 0xD1; // Voltage Reference Contro
-l
=3 sfr SCON1 = 0xD2; // UART1 Control
=3 sfr SBUF1 = 0xD3; // UART1 Data Buffer
=3 sfr P0SKIP = 0xD4; // Port 0 Skip
=3 sfr P1SKIP = 0xD5; // Port 1 Skip
=3 sfr P2SKIP = 0xD6; // Port 2 Skip
=3 sfr USB0XCN = 0xD7; // USB0 Transceiver Control
=3 sfr PCA0CN = 0xD8; // PCA0 Control
=3 sfr PCA0MD = 0xD9; // PCA0 Mode
=3 sfr PCA0CPM0 = 0xDA; // PCA0 Module 0 Mode Regis
-ter
=3 sfr PCA0CPM1 = 0xDB; // PCA0 Module 1 Mode Regis
C51 COMPILER V7.50 F34X_MSD_SECT_SERV 11/28/2006 10:54:26 PAGE 19
-ter
=3 sfr PCA0CPM2 = 0xDC; // PCA0 Module 2 Mode Regis
-ter
=3 sfr PCA0CPM3 = 0xDD; // PCA0 Module 3 Mode Regis
-ter
=3 sfr PCA0CPM4 = 0xDE; // PCA0 Module 4 Mode Regis
-ter
=3 sfr P3SKIP = 0xDF; // Port 3 Skip
=3 sfr ACC = 0xE0; // Accumulator
=3 sfr XBR0 = 0xE1; // Port I/O Crossbar Contro
-l 0
=3 sfr XBR1 = 0xE2; // Port I/O Crossbar Contro
-l 1
=3 sfr XBR2 = 0xE3; // Port I/O Crossbar Contro
-l 2
=3 sfr IT01CF = 0xE4; // INT0/INT1 Configuration
=3 sfr SMOD1 = 0xE5; // UART1 Mode
=3 sfr EIE1 = 0xE6; // Extended Interrupt Enabl
-e 1
=3 sfr EIE2 = 0xE7; // Extended Interrupt Enabl
-e 2
=3 sfr ADC0CN = 0xE8; // ADC0 Control
=3 sfr PCA0CPL1 = 0xE9; // PCA0 Capture 1 Low
=3 sfr PCA0CPH1 = 0xEA; // PCA0 Capture 1 High
=3 sfr PCA0CPL2 = 0xEB; // PCA0 Capture 2 Low
=3 sfr PCA0CPH2 = 0xEC; // PCA0 Capture 2 High
=3 sfr PCA0CPL3 = 0xED; // PCA0 Capture 3 Low
=3 sfr PCA0CPH3 = 0xEE; // PCA0 Capture 3 High
=3 sfr RSTSRC = 0xEF; // Reset Source Configurati
-on/Status
=3 sfr B = 0xF0; // B Register
=3 sfr P0MDIN = 0xF1; // Port 0 Input Mode Config
-uration
=3 sfr P1MDIN = 0xF2; // Port 1 Input Mode Config
-uration
=3 sfr P2MDIN = 0xF3; // Port 2 Input Mode Config
-uration
=3 sfr P3MDIN = 0xF4; // Port 3 Input Mode Config
-uration
=3 sfr P4MDIN = 0xF5; // Port 4 Input Mode Config
-uration
=3 sfr EIP1 = 0xF6; // Extended Interrupt Prior
-ity 1
=3 sfr EIP2 = 0xF7; // Extended Interrupt Prior
-ity 2
=3 sfr SPI0CN = 0xF8; // SPI0 Control
=3 sfr PCA0L = 0xF9; // PCA0 Counter Low
=3 sfr PCA0H = 0xFA; // PCA0 Counter High
=3 sfr PCA0CPL0 = 0xFB; // PCA0 Capture 0 Low
=3 sfr PCA0CPH0 = 0xFC; // PCA0 Capture 0 High
=3 sfr PCA0CPL4 = 0xFD; // PCA0 Capture 4 Low
=3 sfr PCA0CPH4 = 0xFE; // PCA0 Capture 4 High
=3 sfr VDM0CN = 0xFF; // VDD Monitor Control
=3
=3
=3 //----------------------------------------------------------------
--------------
=3 // Bit Definitions
=3 //----------------------------------------------------------------
--------------
=3
=3 // TCON 0x88
C51 COMPILER V7.50 F34X_MSD_SECT_SERV 11/28/2006 10:54:26 PAGE 20
=3 sbit TF1 = 0x8F; // Timer1 overflow flag
=3 sbit TR1 = 0x8E; // Timer1 on/off control
=3 sbit TF0 = 0x8D; // Timer0 overflow flag
=3 sbit TR0 = 0x8C; // Timer0 on/off control
=3 sbit IE1 = 0x8B; // Ext interrupt 1 edge fla
-g
=3 sbit IT1 = 0x8A; // Ext interrupt 1 type
=3 sbit IE0 = 0x89; // Ext interrupt 0 edge fla
-g
=3 sbit IT0 = 0x88; // Ext interrupt 0 type
=3
=3 // SCON0 0x98
=3 sbit S0MODE = 0x9F; // Serial mode control bit
-0
=3 // Bit6 UNUSED
=3 sbit MCE0 = 0x9D; // Multiprocessor communica
-tion enable
=3 sbit REN0 = 0x9C; // Receive enable
=3 sbit TB80 = 0x9B; // Transmit bit 8
=3 sbit RB80 = 0x9A; // Receive bit 8
=3 sbit TI0 = 0x99; // Transmit interrupt flag
=3 sbit RI0 = 0x98; // Receive interrupt flag
=3
=3 // IE 0xA8
=3 sbit EA = 0xAF; // Global interrupt enable
=3 sbit ESPI0 = 0xAE; // SPI0 interrupt enable
=3 sbit ET2 = 0xAD; // Timer2 interrupt enable
=3 sbit ES0 = 0xAC; // UART0 interrupt enable
=3 sbit ET1 = 0xAB; // Timer1 interrupt enable
=3 sbit EX1 = 0xAA; // External interrupt 1 ena
-ble
=3 sbit ET0 = 0xA9; // Timer0 interrupt enable
=3 sbit EX0 = 0xA8; // External interrupt 0 ena
-ble
=3
=3 // IP 0xB8
=3 // Bit7 UNUSED
=3 sbit PSPI0 = 0xBE; // SPI0 interrupt priority
=3 sbit PT2 = 0xBD; // Timer2 priority
=3 sbit PS0 = 0xBC; // UART0 priority
=3 sbit PT1 = 0xBB; // Timer1 priority
=3 sbit PX1 = 0xBA; // External interrupt 1 pri
-ority
=3 sbit PT0 = 0xB9; // Timer0 priority
=3 sbit PX0 = 0xB8; // External interrupt 0 pri
-ority
=3
=3 // SMB0CN 0xC0
=3 sbit MASTER = 0xC7; // Master/slave indicator
=3 sbit TXMODE = 0xC6; // Transmit mode indicator
=3 sbit STA = 0xC5; // Start flag
=3 sbit STO = 0xC4; // Stop flag
=3 sbit ACKRQ = 0xC3; // Acknowledge request
=3 sbit ARBLOST = 0xC2; // Arbitration lost indicat
-or
=3 sbit ACK = 0xC1; // Acknowledge flag
=3 sbit SI = 0xC0; // SMBus interrupt flag
=3
=3 // TMR2CN 0xC8
=3 sbit TF2H = 0xCF; // Timer2 high byte overflo
-w flag
=3 sbit TF2L = 0xCE; // Timer2 low byte overflow
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