iir32.asm

DSP的实验测试程序

;========================================================================
;
; File Name     : iir32.asm
; 
; Originator    : Digital Control Systems Group 
;                 Texas Instruments 
; 
; Description   : This file contain source code for 32 bit IIR implementation
;               
; Date          : 9/2/2001
;======================================================================
; 
; 
; Routine Name  : Generic Function      
; Routine Type  : C Callable
; 
; Description   :
; void IIR5BIQ32_calc(IIR5BIQ32_handle) 
;
; This routine implements the IIR filter using cacade biquad structure
;======================================================================
;typedef struct {   
;   int *coeff_ptr;         /* Pointer to Filter coefficient */
;   int *dbuffer_ptr;       /* Delay buffer ptr              */
;   int nbiq;               /* No of biquad                  */
;   int input;              /* Latest Input sample           */
;   int isf;                /* Input Scale Factor            */ 
;   int qfmat;              /* Coefficients Q Format         */
;   long output;            /* Filter Output                 */
;   void (*init)(void *);   /* Ptr to Init funtion           */
;   void (*calc)(void *);   /* Ptr to calc fn                */
;        }IIR5BIQ32;     
;=====================================================================

;====================================================================
; Function Local Frame
;====================================================================
;   |_______|
;   |_______|<- Stack Pointer                           (FP+3) <---AR1
;   |_______| temp1
;   |_______| temp2
;   |_______|<- Register to Register Tfr & Computation  (FP)   <---AR0 
;   |_______|<- Old FP                                  (FP-1)
;   |_______|<- Return Address of the Caller            (FP-2) 
;   |_______|<- Formal parameter IIR5BIQ16_handle       (FP-3) 
;======================================================================

; Module definition for external referance
                .def    _IIR5BIQ32_calc 

__iir32_calc_frs    .set    00003h; Local frame size for this routine   
   

;*******************************************************************************
; Macro used to multiply 32 bit delay line value with 16bit coeff and Accumulate
;*******************************************************************************
;
;*********************************************************************  
MAC32x16    .macro p,q             
                                    ; ARP=AR3, AR3->w 
            LT      *+,AR4          ; ARP=AR4, AR4->dH(n), TREG=w, AR3->next coeff          
            MPY     *-              ; ARP=AR4, AR4->dL(n), PREG=w*H
            BIT     *,0             ; ARP=AR4, AR4->dL(n), TC=MSBit(dL(n))
            MPYA    *,AR0           ; ARP=AR0, AR0=FP, ACC=ACC + w*H, PREG=w*dL(n)
            SPH     *               ; ARP=AR0, *(FP)=w*dL(n)/2^16
            ADD     *,0,AR4     ; ARP=AR4, AR4->dL(n), ACC=ACC+w*dL(n)/2^16
            BCND    noadd:q:, NTC
            ADD     *               ; ARP=AR4, AD4->dL(n), ACC=ACC+dL(n)
noadd:q:    MAR     *-, AR:p:       ; ARP=AR:p:, AR:p:->next coeff, AR4->dH(n+1) 
            .endm

;*******************************************************************************
; Macro used to multiply 32 bit delay line value with 16bit coeff and Accumulate 
; as well as DMOV
;******************************************************************************* 
MACD32x16   .macro              
                                    ; ARP=AR3, AR3->w   
            LT      *+,AR4          ; ARP=AR4, AR4->dH(n), TREG=w, AR3->next coeff
            MPY     *-              ; ARP=AR4, AR4->dL(n), PREG=w*dH(n)
            BIT     *,0             ; ARP=AR4, AR4->dL(n), TC=MSBit(dL(n))
            MPYA    *,AR0           ; ARP=AR0, AR0=FP, AR4->dL(n), PREG=w*dL(n)  
                                    ; ACC=ACC+w*dH(n)
            SPH     *               ; ARP=AR0, *(FP)=w*dL(n)/2^16 , 
            ADD     *,0,AR4         ; ARP=AR4, AR4->dL(n), ACC=ACC+w*dL(n)/2^16
            BCND    noadd,NTC
            ADD     *               ; ARP=AR4, AD4->dL(n), ACC=ACC+dL(n)
noadd:      
            LT      *+              ; ARP=AR4, AR4->dH(n), TREG=dL(n)
            MPY     #1              ; PREGL=dL(n)
            LPH     *+              ; ARP=AR4, AR4->dL(n-1), PREGH=dH(n)
            SPL     *+              ; ARP=AR4, AR4->dH(n-1), dL(n-1)=dL(n)
            SPH     *-              ; ARP=AR4, AR4->dL(n-1), dH(n-1)=dH(n)
            MAR     *-,AR0          ; ARP=AR0, AR0=FP, AR4->dH(n)  

            .endm
                          
          
_IIR5BIQ32_calc:    
            POPD    *+              ; Store the Return Address in stack
            SAR     AR0,*+          ; Store the Caller's Frame Pointer
            SAR     AR1,*
            LAR     AR0,#__iir32_calc_frs       
            LAR     AR0,*0+,AR2     ; Create Local frame
                        
            SETC    SXM         
            SETC    OVM     
            LAR     AR2,#0FFFDh     ; ARP=AR2, AR2=-3
            MAR     *0+             ; ARP=AR2, AR2=FP-3 points to the input argument 

            LAR     AR2,*           ; ARP=AR2, AR2=IIR5BIQ32_handle->coeff_ptr->a21
            LAR     AR3,*+          ; ARP=AR2, AR2->dbuffer_ptr, AR3=coeff_ptr->a21
            LAR     AR4,*+          ; ARP=AR2, AR2->nbiq, AR4=dbuffer_ptr->d1(n-2)
            LAR     AR5,*+          ; ARP=AR2, AR2->input, AR5=nbiq  
            LT      *+              ; ARP=AR2, AR2->isf, TREG=input
            MPY     *+,AR5          ; ARP=AR5, AR5->nbiq, AR2->qfmat, PREG=input*isf
            MAR     *-,AR3          ; ARP=AR3, AR3=a21, AR5=nbiq-1
            PAC                     ; ACC=input*isf @ in            
                                    
biqd:                               ; kth Biquad Computation   where k=1:nbiq
            MAC32x16 3,1
            MAC32x16 2,2
            RPT     *               ; ARP=AR2, AR2->qfmat 
            SFL
            MAR     *,AR0
            ADRK    #1
            SACL    *+
            SACH    *-
            MAR     *-,AR4      
            
            LACL    #0
            ADRK    #4
            MAR     *,AR3
            MAC32x16 3,3
            MACD32x16
            ADRK    #2 
            LPH     *-,AR4
            SPH     *-,AR0
            LPH     *-,AR4
            SPH     *+,AR3
            MAC32x16 5,4 
                            
            BANZ    biqd,*-,AR3
            
            MAR     *,AR2
            RPT     *
            SFL
            ROR
            MAR     *+          ; ARP=AR2, AR2->output
            SACH    *,0,AR1     ; output=Filtered Output in Q14 format  
                                ; !!!Do not shift it left to store in Q15 format
                                ; If you do so, and if the output is >1, then it will
                                ; become negative..instead of the most desirable Saturation
                 
            CLRC    OVM
            SBRK    #(__iir32_calc_frs+1)   ; Clear the local frame
            LAR     AR0,*-          ; Retrive Caller's frame pointer
            PSHD    *               ; Push the return address to TOS
            RET                     ; Return to the caller