cpu.c

Linux2.4.27在AT91RM9200下的U-BOOT代码。可以在Redhat9等版本下使用。适合ARM学习者使用。

/*
 * (C) Copyright 2004
 * METER Chen
 * http://www.cmtekchina.com
 * mailto:[e-mail]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * S3C4510 CPU specific code
 */

#include <common.h>
#include <command.h>
#include <asm/hardware.h>

#define TagRAM         	0x11000000	/* Tag ram address */
#define CACHE		0x00000002

static void s3c4510_flush_cache(void)
{
	int i;
	uint *tagram; 
#if 0
    	tagram = (uint *)TagRAM;
    	SYSCFG &= ~CACHE;	/* Disable cache before cache flush */

    	for(i=0; i < 256; i++) {
        	*tagram = 0x00000000;
        	tagram += 1; 
    	}
#endif
}


int cpu_init (void)
{
	icache_enable();

	return 0;
}

int cleanup_before_linux (void)
{
	/*
		cache memory should be enabled before calling
		Linux to make the kernel uncompression faster
	*/
	icache_enable();

	disable_interrupts ();

	return 0;
}

void reset_cpu (ulong addr)
{
	/*
		reset the cpu
	*/	
	((void (*)(void))addr)();

	while(1) {
		/*NOP*/
	}
}

int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
	extern void reset_cpu (ulong addr);

	disable_interrupts ();
	reset_cpu (0);

	/*NOTREACHED*/
	return (0);
}

void icache_enable (void)
{
	ulong reg;
#if 0
	s3c4510_flush_cache();

	/*
		Enable chache
	*/
	reg = SYSCFG;
	reg |= CACHE;
	SYSCFG = reg;
#endif
}

void icache_disable (void)
{
	ulong reg;
#if 0
	reg = SYSCFG;
	reg &= ~CACHE;
	SYSCFG = reg;
#endif
}

int icache_status (void)
{
	return 0;
}

void dcache_enable (void)
{
	icache_enable();
}

void dcache_disable (void)
{
	icache_disable();
}

int dcache_status (void)
{
	return dcache_status();
}

/*
	RTC stuff
*/
#include <rtc.h>
#ifndef BCD2HEX
	#define BCD2HEX(n)  ((n>>4)*10+(n&0x0f))
#endif
#ifndef HEX2BCD
	#define HEX2BCD(x) ((((x) / 10) << 4) + (x) % 10)
#endif

void rtc_get (struct rtc_time* tm)
{
}

void rtc_set (struct rtc_time* tm)
{
}

void rtc_reset (void)
{
}


/*
	I2C stuff
*/

/*
 * Initialization, must be called once on start up, may be called
 * repeatedly to change the speed and slave addresses.
 */
void i2c_init(int speed, int slaveaddr)
{
}

/*
 * Probe the given I2C chip address.  Returns 0 if a chip responded,
 * not 0 on failure.
 */
int i2c_probe(uchar chip)
{
	/*
		not implemented
	*/

	printf(__FUNCTION__ " chip %d\n", (int) chip);
	return -1;
}

/*
 * Read/Write interface:
 *   chip:    I2C chip address, range 0..127
 *   addr:    Memory (register) address within the chip
 *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 *              memories, 0 for register type devices with only one
 *              register)
 *   buffer:  Where to read/write the data
 *   len:     How many bytes to read/write
 *
 *   Returns: 0 on success, not 0 on failure
 */

int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
	return 0;
}

int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
	return 0;
}