vga_mem.vhd

罗马尼亚克鲁日工程大学Mircea D&#259 b&acirc can, PhD提供的示波器开发全文挡及C,VHDL代码.

-- video memory: each entry in the memory represents a column on the screen => address <=> x coordinate
-- the value of an entry is the y-coordinate on the screen => data <=> y coordinate

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity vgamemory is
  Port (rst : in std_logic;
        rd : in std_logic;
        wr : in std_logic;
        r_addr : in std_logic_vector(9 downto 0);
        w_addr : in std_logic_vector(9 downto 0);
        dataout : out std_logic_vector(7 downto 0);
        datain : in std_logic_vector(7 downto 0));
end vgamemory;

architecture Behavioral of vgamemory is
type mem_type is array (639 downto 0) of std_logic_vector(7 downto 0); -- memory size: 640x8
signal mem: mem_type;
begin

-- memory read process
process (rst,r_addr, rd, mem)
begin    
  dataout <= (others => '0');
  if (rst = '0' and rd = '1') then
    dataout <= mem(conv_integer(r_addr));
  end if;
end process;	

-- memory write process
process (wr)
begin
  if (wr'event and wr = '0') then
    mem(conv_integer(w_addr)) <= datain;
  end if;
end process;

end Behavioral;