cdt800.h

Senbo公司dos下用于控制A/D及IO的驱动程序,用于cdt800扩展板上,广泛用于嵌入式工业控制领域.

/*
   C language header file for sample programs for the CTD800.
   
   Science & Technology CO.,LTD.
   W2-B5 Shenzhen High-Tech Industrial Park,ShenZhen,GuangDong,P.R.C.

   Tel:   [phone]
   Fax:   [phone]
   Zip:   518057

   Compiler: Turbo C (r) version 1.0, 2.0
	     Turbo C++ (r) version 1.0
	     Borland C++ (r) version 2.0, 3.0

   Last update: February 23, 2002
*/

/*
 The following constants define the location of the various registers on
 the CTD800. They are included to make the code more readable; statements
 such as:

	   outportb(BaseAddress + IRQ_SLCT, 0);

 are less obscure than:

	   outportb(776, 0);

*/

#define CTRL_DATA   0
#define STC_A       1
#define STC_B       2

#define STATUS_BYTE 3
#define CLEAR_INT   3

#define PPI_0       4
#define PPI_1       5
#define PPI_2       6
#define PPI_CTRL    7

#define IRQ_SLCT    8

/*************************

  Special Register Address

  Master Mode Register : MM_Reg
  Alarm 1 Register     : Alarm1_Reg
  Alarm 2 Register     : Alarm2_Reg
  Status  Register     : Status_Reg
*************************/

#define MM_Reg      0x17
#define Alarm1_Reg  0x07
#define Alarm2_Reg  0x0F
#define Status_Reg  0x1F

/*************************

  Element Cycle Register Address

  Mode Regiater Counter1-Counter5
  Load Register Counter1-Counter5
  Hold Register Counter1-Counter5
*************************/

#define COUNTER1_MODE  0x01
#define COUNTER2_MODE  0x02
#define COUNTER3_MODE  0x03
#define COUNTER4_MODE  0x04
#define COUNTER5_MODE  0x05

#define COUNTER1_LOAD  0x09
#define COUNTER2_LOAD  0x0A
#define COUNTER3_LOAD  0x0B
#define COUNTER4_LOAD  0x0C
#define COUNTER5_LOAD  0x0D

#define COUNTER1_HOLD  0x11
#define COUNTER2_HOLD  0x12
#define COUNTER3_HOLD  0x13
#define COUNTER4_HOLD  0x14
#define COUNTER5_HOLD  0x15

/************************

  Hold Cycle Register Address

  Hold Register Counter-Counter5

************************/

#define COUNTER1_CYCLE_HOLD  0x19
#define COUNTER2_CYCLE_HOLD  0x1A
#define COUNTER3_CYCLE_HOLD  0x1B
#define COUNTER4_CYCLE_HOLD  0x1C
#define COUNTER5_CYCLE_HOLD  0x1D