📄 cdt800.c
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/*
C language header file for sample programs for the CTD800.
Science & Technology CO.,LTD.
W2-B5 Shenzhen High-Tech Industrial Park,ShenZhen,GuangDong,P.R.C.
Tel: 86-755-6544000
Fax: 86-755-6549140
Zip: 518057
Compiler: Turbo C (r) version 1.0, 2.0
Turbo C++ (r) version 1.0
Borland C++ (r) version 2.0, 3.0
Last update: February 23, 2002
This file contains procedure and functions used by the sample programs
provided with your CTD800. The procedures are well documented and should
be helpful in learning how to program your CTD800.
*/
#include <dos.h>
#include "cdt800.h"
#define CONTROL 2
#define DATA 0
#define INPUT 1
#define OUTPUT 0
#define TRUE 1
#define FALSE 0
#define HIGH 1
#define LOW 0
#define ENABLED 1
#define DISABLED 0
#define COUNTER1 1
#define COUNTER2 2
#define COUNTER3 3
#define COUNTER4 4
#define COUNTER5 5
unsigned BaseAddress;
/**************************
InitializeBoardSettings
*******************/
void InitializeBoardSettings(unsigned BA)
{
BaseAddress = BA;
}
/*******************
SetIRQStatus
The SetIRQStatus procedure is used to set or clear the IRQ Enable bit
on the CTD800. A value of 1 passed to this procedure enables interrupts,
a value of 0 disables interrupts.
*******************/
void SetIRQStatus(char IRQStatus)
{
outportb(BaseAddress + IRQ_SLCT, IRQStatus); /* write new byte */
}
/*****************
ReadIRQStatus
The ReadIRQStatus procedure is used to return the status of the interrupt
on the CTD800 board.Returning 1 is that an interrupt has occurred;returning
0 is that an interrupt does not occer.
*****************/
char ReadIRQStatus(void)
{
if(inportb(BaseAddress + STATUS_BYTE) & 0x02)
return TRUE;
else
return FALSE;
}
/************************
ClearIRQ(void)
Each time the interrupt status bit goes high,a write should follow to clear
the bit.
************************/
void ClearIRQ(void)
{
outportb(BaseAddress + CLEAR_INT, 0); /* Clear Interrupt on SF94A-08 */
}
/******************
Set AM9513A C/D Pin Status
This procedure is used to configure the Am9513A for either data port or
control port. A value of 0 means data port, a value of 2 is for control port.
It is advisable to use the DATA and CONTROL constants defined in this file.
******************/
void SetC_DStatus(char C_DStatus)
{
outportb(BaseAddress + CTRL_DATA, C_DStatus);
}
/*************
LOAD_DATA_POINTER
Loading the Data Pointer use to random access to any available internal data
locations,and initialize a data read or data write.
LDPD -- internal data location
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
*************/
void LOAD_DATA_POINTER(unsigned char LDPD,unsigned char chip)
{
unsigned char B;
B = LDPD & 0x1F;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/*************
ARM
A counter must be armed before counting can commerce.Once armed,the counting
process may be further enabled or disabled using the hardware gating facilities.
This command can only arm or do nothing for a given counter.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
*************/
void ARM(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0x20;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/*************
LOAD_COUNTER
This command will cause a transfer independent of any current operating
configuration for the counter.It will often be used as a software retrigger
or as counter initializatiom prior to active hardware gating.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
*************/
void LOAD_COUNTER(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0x40;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/*************
LOAD_ARM
A LOAD_ARM command which drives a counter to TC generates the same sequence
of operations as execution of a LOAD command and then an ARM command.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
*************/
void LOAD_ARM(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0x60;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/*************
DISARM
A disarmed counter will cease all counting independent of other conditions.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
*************/
void DISARM(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0xC0;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
SAVE_COUNTER
This command will overwrite any previous Hold register contents.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void SAVE_COUNTER(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0xA0;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
DISARM_SAVE
This command is identical to issuing a DISARM command followed by a SAVE
command.
S -- 1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void DISARM_SAVE(unsigned char S,unsigned char chip)
{
unsigned char B,counter[5]={1,2,4,8,16};
B = counter[S-1] | 0x80;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
SET_TC_TOGGLE
This command conditions the TC Toggle flip-flop,but does not appear at the
counter output unless TC Toggle mode is selected.
counter -- select counter,1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void SET_TC_TOGGLE(unsigned char counter,unsigned char chip)
{
unsigned char B;
B = counter | 0xE8;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
CLEAR_TC_TOGGLE
This command conditions the TC Toggle flip-flop,but does not appear at the
counter output unless TC Toggle mode is selected.
counter -- select counter,1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void CLEAR_TC_TOGGLE(unsigned char counter,unsigned char chip)
{
unsigned char B;
B = counter | 0xE0;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
STEP
If the Counter Mode register associated with the selected counter has its
CM3 bit cleared to zero,this command will cause the counter to decrement by
one.
counter -- select counter,1 is for counter 1,2 is for counter 2,and so on
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void STEP(unsigned char counter,unsigned char chip)
{
unsigned char B;
B = counter | 0xF0;
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, B);
}
/**************
SET_MM14
This command sets Master Mode bit 14 without affecting other bits in the
Master Mode register.Disabling the sequencing allows repetitive host processor
access to a given internal location without repetitive updating of the Data
Pointer.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void SET_MM14(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xE8);
}
/**************
CLEAR_MM14
This command clears Master Mode bit 14 without affecting other bits in the
Master Mode register.When MM14 is cleared,enabling the sequencing allows
sequential host processor access to serveral internal locations without
repetitive updating of the Data Pointer.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void CLEAR_MM14(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xE0);
}
/**************
SET_MM13
This command sets Master Mode bit 13 without affecting other bits in the
Master Mode register.When MM13 is set,no multiplexing takes place and all
16 external data bus lines are used to transfer information into and out of
the STC.
Note:The CTD800 board data bus is 8-bit width.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void SET_MM13(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xEF);
}
/**************
CLEAR_MM13
This command clears Master Mode bit 13 without affecting other bits in the
Master Mode register.When MM13 is cleared,the multiplexer is enabled and 16-bit
internal information is transferred eight bits at a time to the eight low-order
external data bus lines.
Note:The CTD800 board data bus is 8-bit width.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void CLEAR_MM13(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xE7);
}
/**************
SET_MM12
This command sets Master Mode bit 12 without affecting other bits in the
Master Mode register.When MM12 is set ,the FOUT line will exhibit a low-impedance
to ground.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void SET_MM12(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xEE);
}
/**************
CLEAR_MM12
This command clears Master Mode bit 12 without affecting other bits in the
Master Mode register.When MM12 is cleared,FOUT will become active and will
drive out the selected and divided FOUT signal.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void CLEAR_MM12(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xE6);
}
/**************
Enable_Prefetch
This command re-enables the prefetch circuitry for Write operations.
Note:This command is only available in Am9513'A' devices;it is an illegal
command in the "non-A Am9513"device.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void Enable_Prefetch(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xF8);
}
/**************
Disable_Prefetch
This command disables the prefetch circuitry during Write operations.
Note:This command is only available in Am9513'A' devices;it is an illegal
command in the "non-A Am9513"device.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void Disable_Prefetch(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xF9);
}
/**************
Master_Reset
This command duplicates the action of the power-on reset circuitry.It disarms
all counters,enters 0000 in the Master Mode,Load an Hold registers and enters
0B00(hex) in the Counter Mode registers.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void Master_Reset(unsigned char chip)
{
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0xFF); /* Perform a software reset */
SetC_DStatus(CONTROL);
outportb(BaseAddress + STC_A + chip, 0x5F); /* Using the "command Initiation" */
/* procedure,enter the LOAD command */
/* for all counters,opcode 5F(hex) */
LOAD_DATA_POINTER(0x17, chip); /* Set the Data Pointer to a valid code */
/* Point to the Master Mode -- 17(hex) */
}
/**************
WriteData
This procedure is used to write a 16-bit value to any available internal
data locations by loading the Data Pointer register.
Data -- write a 16-bit value
addr -- any internal available data locations
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
**************/
void WriteData(unsigned Data,unsigned char addr,unsigned char chip)
{
unsigned char MSB,LSB;
LSB = Data % 256;
MSB = Data / 256;
LOAD_DATA_POINTER(addr,chip);
SetC_DStatus(DATA);
outportb(BaseAddress + STC_A + chip, LSB);
outportb(BaseAddress + STC_A + chip, MSB);
}
/***********
ReadStatus
The ReadStatus procedure is used to return the Am9513A Status register
by reading the Control port.
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
***********/
char ReadStatus(unsigned char chip)
{
SetC_DStatus(CONTROL);
return inportb(BaseAddress + STC_A + chip);
}
/***********
ReadData
This procedure is used to return a 16-bit value that is any internal
available data locations by loading the Data Pointer register.
addr -- any internal available data locations
chip -- select U5(chip equal to 0) or U6(chip equal to 1)
***********/
unsigned int ReadData(unsigned char addr,unsigned char chip)
{
unsigned char MSB, LSB;
LOAD_DATA_POINTER(addr,chip);
SetC_DStatus(DATA);
LSB = inportb(BaseAddress + STC_A + chip);
MSB = inportb(BaseAddress + STC_A + chip);
return(MSB * 256 + LSB);
}
/**********
Read DigitalIO
The ReadDigitalIO function returns the value of the specified digital input
port.Each digital input line is represented by a bit of the return value.
Digital in 0 is bit 0, digital in 1 is bit 1, and so on.
***********/
unsigned char ReadDigitalIO(unsigned char InputPort)
{
return(inportb(BaseAddress + PPI_0 + InputPort));
}
/***********
WriteDigitalIO
The WriteDigitalIO function sets the value of the digital output port to
equal the value passed as parameter v. Each digital output line is represented
by a bit of v. Digital out 0 is bit 0, digital out 1 is bit 1,and so on.
***********/
void WriteDigitalIO(unsigned char OutputPort, unsigned char v)
{
outportb(BaseAddress + PPI_0 + OutputPort, v);
}
/*****************
ConfigureIOPorts
The ConfigureIOPorts procedure is used to configure the ports 0,1,and 2 on
the uPD71055 PPI for either input or output.A value of 1 means input, a value
of 0 is for output. It is advisable to use the INPUT and OUTPUT constants
defined in this file.
*****************/
void ConfigureIOPorts(unsigned char PortA, unsigned char PortB,unsigned char PortC)
{
unsigned char ControlByte;
ControlByte = 128 + (PortA * 16) + (PortB * 2) + (PortC * 9);
outportb(BaseAddress+PPI_CTRL, ControlByte);
}
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