📄 stm32f10x_tim.lst
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855 *******************************************************************************/
856 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
857 {
858 u32 tmpccmr1 = 0;
859
860 /* Check the parameters */
861 assert(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
862
863 tmpccmr1 = TIMx->CCMR1;
864
865 /* Reset the OCM Bits */
866 tmpccmr1 &= CCMR_OCM13_Mask;
867
868 /* Configure The Forced output Mode */
869 tmpccmr1 |= TIM_ForcedAction;
870
871 TIMx->CCMR1 = (u16)tmpccmr1;
872 }
873
874 /*******************************************************************************
875 * Function Name : TIM_ForcedOC2Config
876 * Description : Forces the TIMx output 2 waveform to active or inactive level.
877 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
878 * - TIM_ForcedAction: specifies the forced Action to be set to
879 * the output waveform.
880 * This parameter can be one of the following values:
881 * - TIM_ForcedAction_Active: Force active level on OC2REF
882 * - TIM_ForcedAction_InActive: Force inactive level on
883 * OC2REF.
884 * Output : None
885 * Return : None
886 *******************************************************************************/
887 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
888 {
889 u32 tmpccmr1 = 0;
890
891 /* Check the parameters */
892 assert(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
893
894 tmpccmr1 = TIMx->CCMR1;
895
896 /* Reset the OCM Bits */
897 tmpccmr1 &= CCMR_OCM24_Mask;
898
899 /* Configure The Forced output Mode */
900 tmpccmr1 |= (u16)(TIM_ForcedAction << 8);
901
902 TIMx->CCMR1 = (u16)tmpccmr1;
903 }
904
905 /*******************************************************************************
906 * Function Name : TIM_ForcedOC3Config
907 * Description : Forces the TIMx output 3 waveform to active or inactive level.
908 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
909 * - TIM_ForcedAction: specifies the forced Action to be set to
910 * the output waveform.
911 * This parameter can be one of the following values:
912 * - TIM_ForcedAction_Active: Force active level on OC3REF
913 * - TIM_ForcedAction_InActive: Force inactive level on
914 * OC3REF.
915 * Output : None
916 * Return : None
917 *******************************************************************************/
918 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
919 {
920 u32 tmpccmr2 = 0;
921
922 /* Check the parameters */
923 assert(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
924
925 tmpccmr2 = TIMx->CCMR2;
926
927 /* Reset the OCM Bits */
928 tmpccmr2 &= CCMR_OCM13_Mask;
929
930 /* Configure The Forced output Mode */
931 tmpccmr2 |= TIM_ForcedAction;
932
933 TIMx->CCMR2 = (u16)tmpccmr2;
934 }
935
936 /*******************************************************************************
937 * Function Name : TIM_ForcedOC4Config
938 * Description : Forces the TIMx output 4 waveform to active or inactive level.
939 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
940 * - TIM_ForcedAction: specifies the forced Action to be set to
941 * the output waveform.
942 * This parameter can be one of the following values:
943 * - TIM_ForcedAction_Active: Force active level on OC4REF
944 * - TIM_ForcedAction_InActive: Force inactive level on
945 * OC4REF.
946 * Output : None
947 * Return : None
948 *******************************************************************************/
949 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction)
950 {
951 u32 tmpccmr2 = 0;
952
953 /* Check the parameters */
954 assert(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
955
956 tmpccmr2 = TIMx->CCMR2;
957
958 /* Reset the OCM Bits */
959 tmpccmr2 &= CCMR_OCM24_Mask;
960
961 /* Configure The Forced output Mode */
962 tmpccmr2 |= (u16)(TIM_ForcedAction << 8);
963
964 TIMx->CCMR2 = (u16)tmpccmr2;
965 }
966
967 /*******************************************************************************
968 * Function Name : TIM_ARRPreloadConfig
969 * Description : Enables or disables TIMx peripheral Preload register on ARR.
970 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
971 * - Newstate: new state of the TIMx peripheral Preload register
972 * This parameter can be: ENABLE or DISABLE.
973 * Output : None
974 * Return : None
975 *******************************************************************************/
976 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState Newstate)
977 {
978 u32 tmpcr1 = 0;
979
980 /* Check the parameters */
981 assert(IS_FUNCTIONAL_STATE(Newstate));
982
983 tmpcr1 = TIMx->CR1;
984
985 if (Newstate != DISABLE)
986 {
987 /* Set the ARR Preload Bit */
988 tmpcr1 |= CR1_ARPE_Set;
989 }
990 else
991 {
992 /* Reset the ARR Preload Bit */
993 tmpcr1 &= CR1_ARPE_Reset;
994 }
995
996 TIMx->CR1 = (u16)tmpcr1;
997 }
998
999 /*******************************************************************************
1000 * Function Name : TIM_SelectCCDMA
1001 * Description : Selects the TIMx peripheral Capture Compare DMA source.
1002 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1003 * - Newstate: new state of the Capture Compare DMA source
1004 * This parameter can be: ENABLE or DISABLE.
1005 * Output : None
1006 * Return : None
1007 *******************************************************************************/
1008 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState Newstate)
1009 {
1010 u32 tmpcr2 = 0;
1011
1012 /* Check the parameters */
1013 assert(IS_FUNCTIONAL_STATE(Newstate));
1014
1015 tmpcr2 = TIMx->CR2;
1016
1017 if (Newstate != DISABLE)
1018 {
1019 /* Set the CCDS Bit */
1020 tmpcr2 |= CR2_CCDS_Set;
1021 }
1022 else
1023 {
1024 /* Reset the CCDS Bit */
1025 tmpcr2 &= CR2_CCDS_Reset;
1026 }
1027
1028 TIMx->CR2 = (u16)tmpcr2;
1029 }
1030
1031 /*******************************************************************************
1032 * Function Name : TIM_OC1PreloadConfig
1033 * Description : Enables or disables the TIMx peripheral Preload register on CCR1.
1034 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1035 * - TIM_OCPreload: new state of the TIMx peripheral Preload
1036 * register
1037 * This parameter can be one of the following values:
1038 * - TIM_OCPreload_Enable
1039 * - TIM_OCPreload_Disable
1040 * Output : None
1041 * Return : None
1042 *******************************************************************************/
1043 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload)
1044 {
1045 u32 tmpccmr1 = 0;
1046
1047 /* Check the parameters */
1048 assert(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
1049
1050 tmpccmr1 = TIMx->CCMR1;
1051
1052 /* Reset the OCPE Bit */
1053 tmpccmr1 &= CCMR_OC13PE_Mask;
1054
1055 /* Enable or Disable the Output Compare Preload feature */
1056 tmpccmr1 |= TIM_OCPreload;
1057
1058 TIMx->CCMR1 = (u16)tmpccmr1;
1059 }
1060
1061 /*******************************************************************************
1062 * Function Name : TIM_OC2PreloadConfig
1063 * Description : Enables or disables the TIMx peripheral Preload register on CCR2.
1064 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
1065 * - TIM_OCPreload: new state of the TIMx peripheral Preload
1066 * register
1067 * This parameter can be one of the following values:
1068 * - TIM_OCPreload_Enable
1069 * - TIM_OCPreload_Disable
1070 * Output : None
1071 * Return : None
1072 *******************************************************************************/
1073 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload)
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