📄 stm32f10x_tim.lst
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# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 KICKSTART 24/Dec/2007 11:03:42 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Stack alignment = 4 #
# Source file = C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\L #
# CDDemo\library\src\stm32f10x_tim.c #
# Command line = "C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\ #
# LCDDemo\library\src\stm32f10x_tim.c" -D #
# VECT_TAB_FLASH -lC "C:\Manley\EKBoard\EKSTM32F\LCDDe #
# mo(lcd+led+buttom)\LCDDemo\project\EWARM\BOOT_FLASH\ #
# List\" -lA "C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+l #
# ed+buttom)\LCDDemo\project\EWARM\BOOT_FLASH\List\" #
# -o "C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+butto #
# m)\LCDDemo\project\EWARM\BOOT_FLASH\Obj\" -z3 #
# --no_cse --no_unroll --no_inline --no_code_motion #
# --no_tbaa --no_clustering --no_scheduling --debug #
# --cpu_mode thumb --endian little --cpu cortex-M3 #
# --stack_align 4 --require_prototypes --fpu None #
# --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 #
# Kickstart\arm\LIB\dl7mptnnl8f.h" -I #
# "C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\ #
# LCDDemo\project\EWARM\..\" -I #
# "C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\ #
# LCDDemo\project\EWARM\..\..\library\inc\" -I #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0 Kickstart\arm\INC\" #
# List file = C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\L #
# CDDemo\project\EWARM\BOOT_FLASH\List\stm32f10x_tim.l #
# st #
# Object file = C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\L #
# CDDemo\project\EWARM\BOOT_FLASH\Obj\stm32f10x_tim.r7 #
# 9 #
# #
# #
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C:\Manley\EKBoard\EKSTM32F\LCDDemo(lcd+led+buttom)\LCDDemo\library\src\stm32f10x_tim.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_tim.c
3 * Author : MCD Application Team
4 * Date First Issued : 09/29/2006
5 * Description : This file provides all the TIM firmware functions.
6 ********************************************************************************
7 * History:
8 * 05/21/2007: V0.3
9 * 04/02/2007: V0.2
10 * 02/05/2007: V0.1
11 * 09/29/2006: V0.01
12 ********************************************************************************
13 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *******************************************************************************/
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_tim.h"
23 #include "stm32f10x_rcc.h"
24
25 /* Private typedef -----------------------------------------------------------*/
26 /* Private define ------------------------------------------------------------*/
27 /* ---------------------- TIM registers bit mask ------------------------ */
28 #define CR1_CEN_Set ((u16)0x0001)
29 #define CR1_CEN_Reset ((u16)0x03FE)
30 #define CR1_UDIS_Set ((u16)0x0002)
31 #define CR1_UDIS_Reset ((u16)0x03FD)
32 #define CR1_URS_Set ((u16)0x0004)
33 #define CR1_URS_Reset ((u16)0x03FB)
34 #define CR1_OPM_Mask ((u16)0x03F7)
35 #define CR1_CounterMode_Mask ((u16)0x039F)
36 #define CR1_ARPE_Set ((u16)0x0080)
37 #define CR1_ARPE_Reset ((u16)0x037F)
38 #define CR1_CKD_Mask ((u16)0x00FF)
39
40 #define CR2_CCDS_Set ((u16)0x0008)
41 #define CR2_CCDS_Reset ((u16)0x0007)
42 #define CR2_MMS_Mask ((u16)0x0080)
43 #define CR2_TI1S_Set ((u16)0x0080)
44 #define CR2_TI1S_Reset ((u16)0xFF70)
45
46 #define SMCR_SMS_Mask ((u16)0xFFF0)
47 #define SMCR_ETR_Mask ((u16)0x00F7)
48 #define SMCR_TS_Mask ((u16)0xFF87)
49 #define SMCR_MSM_Mask ((u16)0xFF77)
50 #define SMCR_ECE_Set ((u16)0x4000)
51
52 #define CCMR_CC13S_Mask ((u16)0x7F7C)
53 #define CCMR_CC24S_Mask ((u16)0x7C7F)
54 #define CCMR_TI13Direct_Set ((u16)0x0001)
55 #define CCMR_TI24Direct_Set ((u16)0x0100)
56 #define CCMR_OC13FE_Mask ((u16)0x7F7B)
57 #define CCMR_OC24FE_Mask ((u16)0x7B7F)
58 #define CCMR_OC13PE_Mask ((u16)0x7F77)
59 #define CCMR_OC24PE_Mask ((u16)0x777F)
60 #define CCMR_OCM13_Mask ((u16)0x7F0F)
61 #define CCMR_OCM24_Mask ((u16)0x0F7F)
62
63 #define CCMR_OC13CE_Mask ((u16)0xFF7F)
64 #define CCMR_OC24CE_Mask ((u16)0x7FFF)
65
66 #define CCMR_IC13PSC_Mask ((u16)0xFFF3)
67 #define CCMR_IC24PSC_Mask ((u16)0xF3FF)
68 #define CCMR_IC13F_Mask ((u16)0xFF0F)
69 #define CCMR_IC24F_Mask ((u16)0x0FFF)
70
71 #define CCER_CC1P_Mask ((u16)0xFFFD)
72 #define CCER_CC2P_Mask ((u16)0xFFDF)
73 #define CCER_CC3P_Mask ((u16)0xFDFF)
74 #define CCER_CC4P_Mask ((u16)0xDFFF)
75
76 #define CCER_CC1E_Set ((u16)0x0001)
77 #define CCER_CC1E_Reset ((u16)0xFFFE)
78 #define CCER_CC1E_Mask ((u16)0xFFFE)
79
80 #define CCER_CC2E_Set ((u16)0x0010)
81 #define CCER_CC2E_Reset ((u16)0xFFEF)
82 #define CCER_CC2E_Mask ((u16)0xFFEF)
83
84 #define CCER_CC3E_Set ((u16)0x0100)
85 #define CCER_CC3E_Reset ((u16)0xFEFF)
86
87 #define CCER_CC4E_Set ((u16)0x1000)
88 #define CCER_CC4E_Reset ((u16)0xEFFF)
89 #define CCER_CC4E_Mask ((u16)0xEFFF)
90
91 #define DCR_DMA_Mask ((u16)0x0000)
92
93 /* TIM private Masks */
94 #define TIM_Period_Reset_Mask ((u16)0x0000)
95 #define TIM_Prescaler_Reset_Mask ((u16)0x0000)
96 #define TIM_Pulse_Reset_Mask ((u16)0x0000)
97 #define TIM_ICFilter_Mask ((u8)0x00)
98
99 /* Private macro -------------------------------------------------------------*/
100 /* Private variables ---------------------------------------------------------*/
101 static uc16 Tab_OCModeMask[4] = {0xFF00, 0x00FF, 0xFF00, 0x00FF};
102 static uc16 Tab_PolarityMask[4] = {CCER_CC1P_Mask, CCER_CC2P_Mask, CCER_CC3P_Mask, CCER_CC4P_Mask};
103
104 /* Private function prototypes -----------------------------------------------*/
105 static void PWMI_Config(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
106 static void TI1_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
107 u8 TIM_ICFilter);
108 static void TI2_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
109 u8 TIM_ICFilter);
110 static void TI3_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
111 u8 TIM_ICFilter);
112 static void TI4_Config(TIM_TypeDef* TIMx, u16 TIM_ICPolarity, u16 TIM_ICSelection,
113 u8 TIM_ICFilter);
114 /* Private functions ---------------------------------------------------------*/
115
116 /*******************************************************************************
117 * Function Name : TIM_DeInit
118 * Description : Deinitializes the TIMx peripheral registers to their default
119 * reset values.
120 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
121 * Output : None
122 * Return : None
123 *******************************************************************************/
124 void TIM_DeInit(TIM_TypeDef* TIMx)
125 {
126 switch (*(u32*)&TIMx)
127 {
128 case TIM2_BASE:
129 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
130 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
131 break;
132
133 case TIM3_BASE:
134 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
136 break;
137
138 case TIM4_BASE:
139 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
140 RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
141 break;
142
143 default:
144 break;
145 }
146 }
147
148 /*******************************************************************************
149 * Function Name : TIM_TimeBaseInit
150 * Description : Initializes the TIMx Time Base Unit peripheral according to
151 * the specified parameters in the TIM_TimeBaseInitStruct.
152 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
153 * - TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
154 * structure that contains the configuration information for
155 * the specified TIM peripheral.
156 * Output : None
157 * Return : None
158 *******************************************************************************/
159 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
160 {
161 /* Check the parameters */
162 assert(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
163 assert(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
164
165 /* Set the Autoreload value */
166 TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
167
168 /* Set the Prescaler value */
169 TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
170
171 /* Select the Counter Mode and set the clock division */
172 TIMx->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask;
173 TIMx->CR1 |= (u32)TIM_TimeBaseInitStruct->TIM_ClockDivision |
174 TIM_TimeBaseInitStruct->TIM_CounterMode;
175 }
176 /*******************************************************************************
177 * Function Name : TIM_OCInit
178 * Description : Initializes the TIMx peripheral according to the specified
179 * parameters in the TIM_OCInitStruct.
180 * Input : - TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
181 * - TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
182 * that contains the configuration information for the specified
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