📄 net_nic.c
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reg_val = (MACB_MAN & 0x0000FFFF); /* Read the management register data */
reg_val = 0;
} else {
*perr = NET_PHY_ERR_NONE;
reg_val = (MACB_MAN & 0x0000FFFF); /* Read the management register data */
}
return (reg_val);
}
/*
*********************************************************************************************************
* NetNIC_PhyRegWr()
*
* Description : Write PHY data value.
*
* Argument(s) : phy PHY address, normally 0.
* reg PHY register.
* val Data to write to PHY register.
* perr Pointer to variable that will hold the return error code from this function
*
* Return(s) : none.
*
* Caller(s) : NetNIC_PhyInit(),
* NetNIC_PhyIsLinkUp().
*
* Note(s) : Register ALWAYS writes 16-bit data values.
*********************************************************************************************************
*/
void NetNIC_PhyRegWr (CPU_INT08U phy,
CPU_INT08U reg,
CPU_INT16U val,
NET_ERR *perr)
{
CPU_INT08U retries;
volatile CPU_INT32U i;
MACB_MAN = (MACB_MAN_SOF & (1 << 30)) /* Start of frame code (must be 0x01 */
| MACB_MAN_WRITE /* RW flags, must be 0x01 for Read */
| MACB_MAN_PHYA(phy) /* Specify the address of the PHY to read from */
| MACB_MAN_REGA(reg) /* Supply the addres of the PHY register to read */
| MACB_MAN_CODE /* IEEE code, must be 0x10 */
| MACB_MAN_DATA(val); /* Specify the data to be written */
retries = 3;
/* Wait for commmand to finish */
while (((MACB_NSR & MACB_NSR_IDLE) == 0) && retries > 0) {
for (i = 0; i < 1000; i++) { /* Delay while the write is in progress */
;
}
retries--;
}
if (retries == 0) {
*perr = NET_PHY_ERR_REGWR_TIMEOUT; /* If a timeout occured, return net nic err timeout */
} else {
*perr = NET_PHY_ERR_NONE;
}
}
/*
*********************************************************************************************************
*********************************************************************************************************
* LOCAL FUNCTIONS
*********************************************************************************************************
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* NetNIC_RxISR_Handler()
*
* Description : Signal Network Interface Receive Task that a receive packet is available.
*
* Argument(s) : none.
*
* Return(s) : none.
*
* Caller(s) : NetNIC_ISR_Handler().
*
* Note(s) : (1) NetNIC_ISR_Handler() decodes MACB Receive ISR & calls NetNIC_RxISR_Handler().
*********************************************************************************************************
*/
static void NetNIC_RxISR_Handler (void)
{
CPU_INT16S n_new;
NET_ERR err;
n_new = NIC_GetNRdy() - NIC_RxNRdyCtr; /* Determine how many NEW packets have been received */
while (n_new > 0) {
NetOS_IF_RxTaskSignal(&err); /* Signal Net IF Rx Task of NIC rx pkt. */
switch (err) {
case NET_IF_ERR_NONE:
if (NIC_RxNRdyCtr < NIC_RX_N_BUFS) {
NIC_RxNRdyCtr++;
}
break;
case NET_IF_ERR_RX_Q_FULL:
case NET_IF_ERR_RX_Q_POST_FAIL:
default:
NetNIC_RxPktDiscard(0, &err); /* If any net drv signal err, discard rx pkt. */
break;
}
n_new--;
}
}
/*
*********************************************************************************************************
* NetNIC_TxISR_Handler()
*
* Description : (1) Clear transmit interrupt &/or transmit errors :
*
* (a) Acknowledge transmit interrupt.
* (b) Post transmit FIFO empty signal.
*
*
* Argument(s) : none.
*
* Return(s) : none.
*
* Caller(s) : NetNIC_ISR_Handler().
*
* Note(s) : (2) NetNIC_ISR_Handler() decodes AT91SAM9260 Transmit ISR & calls NetNIC_TxISR_Handler().
*********************************************************************************************************
*/
static void NetNIC_TxISR_Handler (void)
{
/* Interrupts are acknowledged when ISR read. */
/* ISR are previously read in NetNIC_ISR_Handler(). */
/* ------------- POST TX COMPLETE SIGNAL ------------- */
NetOS_NIC_TxRdySignal();
}
/*
*********************************************************************************************************
* NetNIC_TxPktDiscard()
*
* Description : On any Transmit errors, set error.
*
* Argument(s) : pbuf Pointer to network buffer.
*
* perr Pointer to variable that will hold the return error code from this function :
*
* NET_ERR_TX Transmit error; packet discarded.
*
* Return(s) : none.
*
* Caller(s) : NetNIC_TxPkt().
*********************************************************************************************************
*/
static void NetNIC_TxPktDiscard (NET_ERR *perr)
{
#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
#if (CPU_CFG_CRITICAL_METHOD == CPU_CRITICAL_METHOD_STATUS_LOCAL)
CPU_SR cpu_sr;
#endif
#endif
NET_CTR_ERR_INC(NetNIC_ErrTxPktDiscardedCtr);
*perr = NET_ERR_TX;
}
/*
*********************************************************************************************************
* MACB_Init()
*
* Description : (1) Initialize & start MACB :
*
* (a) Initialize Interrupts.
* (b) Initialize Registers.
* (c) Initialize MAC Address.
* (d) Initialize RX Buffer descriptors.
* (e) Initialize Auto Negotiation.
* (f) Enable Receiver/Transmitter.
* (g) Initialize External Interrupt Controller. See Note #4.
*
*
* Argument(s) : perr Pointer to variable that will hold the return error code from this function :
*
*
*
* Return(s) : none.
*
* Caller(s) : NetNIC_Init().
*
* Note(s) : (2) See this 'net_nic.c MACB REGISTER BITS' for register bit summary.
*
* (3) (a) Assumes MAC address to set has previously been initialized by
*
* (1) MACB's EEPROM for EMAC_MAC_ADDR_SEL_EEPROM
* (2) Application code for EMAC_MAC_ADDR_SEL_CFG
*
* (b) The MACB module allow configuration of six MAC addresses that will be
* used to accept or reject an ethernet packet. This driver uses one of these.
*
* (4) Interrupts MUST be enabled ONLY after ALL network initialization is complete (see also
* 'net.c Net_Init() Note #4c').
*
*********************************************************************************************************
*/
static void MACB_Init (NET_ERR *perr)
{
CPU_INT32U mck_frq;
MACB_RxDis(); /* Disable the EMAC receiver */
MACB_TxDis(); /* Disable the EMAC transmitter */
NetBSP_Phy_HW_Init(); /* User implemented in net_bsp.c, reset / init the PHY */
/* and configure the necessary IO pins that it req's */
MACB_NCR |= MACB_NCR_MPE; /* Enable the management port. Comm between EMAC/PHY */
mck_frq = NetBSP_EMAC_ClkFreq() / 1000;
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